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74LVQ174 fiches techniques PDF

Fairchild Semiconductor - Low Voltage Hex D-Type Flip-Flop with Master Reset

Numéro de référence 74LVQ174
Description Low Voltage Hex D-Type Flip-Flop with Master Reset
Fabricant Fairchild Semiconductor 
Logo Fairchild Semiconductor 





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74LVQ174 fiche technique
May 1998
74LVQ174
Low Voltage Hex D-Type Flip-Flop with Master Reset
General Description
The LVQ174 is a high-speed hex D-type flip-flop. The device
is used primarily as a 6-bit edge-triggered storage register.
The information on the D inputs is transferred to storage dur-
ing the LOW-to-HIGH clock transition. The device has a
Master Reset to simultaneously clear all flip-flops.
Features
n Ideal for low power/low noise 3.3V applications
n Guaranteed simultaneous switching noise level and
dynamic threshold performance
n Guaranteed pin-to-pin skew AC performance
n Guaranteed incident wave switching into 75
Ordering Code:
Order Number
74LVQ174SC
74LVQ174SJ
Package Number
M16A
M16D
Package Description
16-Lead (0.150" Wide) Small Outline Integrated Circuit, SOIC JEDEC
16-Lead Molded Small Outline Package, SOIC EIAJ
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
Pin Assignment for
SOIC JEDEC and EIAJ
IEEE/IEC
DS011353-1
DS011353-2
DS011353-3
Pin Descriptions
Pin Names
D0– D5
CP
MR
Q0– Q5
Description
Data Inputs
Clock Pulse Input
Master Reset Input
Outputs
© 1998 Fairchild Semiconductor Corporation DS011353
www.fairchildsemi.com

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