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PDF 74LVT125 Data sheet ( Hoja de datos )
| Número de pieza | 74LVT125 | |
| Descripción | 3.3V Quad buffer 3-State | |
| Fabricantes | NXP Semiconductors | |
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74LVT125
3.3 V quad buffer; 3-state
Rev. 05 — 10 February 2005
Product data sheet
1. General description
The LVT125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.
This device combines low static and dynamic power dissipation with high speed and high
output drive. The 74LVT125 device is a quad buffer that is ideal for driving bus lines. The
device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one
of the 3-state outputs.
2. Features
s Quad bus interface
s 3-state buffers
s Output capability: +64 mA and −32 mA
s TTL input and output switching levels
s Input and output interface capability to systems at 5 V supply
s Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused
inputs
s Live insertion and extraction permitted
s No bus current loading when output is tied to 5 V bus
s Power-up 3-state
s Latch-up protection:
x JESD78: exceeds 500 mA
s ESD protection:
x MIL STD 883 method 3015: exceeds 2000 V
x Machine model: exceeds 200 V
3. Quick reference data
Table 1: Quick reference data
GND = 0 V; Tamb = 25 °C.
Symbol Parameter
Conditions
tPLH propagation delay nA to nY CL = 50 pF; VCC = 3.3 V
tPHL propagation delay nA to nY CL = 50 pF; VCC = 3.3 V
CI input capacitance
VI = 0 V or 3.0 V
CO output capacitance
outputs disabled;
VO = 0 V or 3.0 V
ICC quiescent supply current outputs disabled;
VCC = 3.6 V
Min Typ Max Unit
- 2.7 - ns
- 2.9 - ns
- 4 - pF
- 8 - pF
- 0.13 - mA
1 page  
Philips Semiconductors
74LVT125
3.3 V quad buffer; 3-state
9. Recommended operating conditions
Table 6: Recommended operating conditions
Symbol Parameter
Conditions
VCC supply voltage
VI input voltage
VIH HIGH-level input voltage
VIL LOW-level input voltage
IOH HIGH-level output current
IOL LOW-level output current none
current duty cycle
≤ 50 %; f ≥ 1 kHz
∆t/∆V input transition rise or fall
rate
Tamb ambient temperature
in free air
Min Typ Max Unit
2.7 -
3.6 V
0-
5.5 V
2.0 - - V
- - 0.8 V
- - −32 mA
- - 32 mA
- - 64 mA
0-
10 ns/V
−40 -
+85 °C
10. Static characteristics
Table 7: Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ Max
Tamb = −40 °C to +85 °C [1]
VIK input diode voltage
VOH HIGH-level output voltage
VOL LOW-level output voltage
ILI input leakage current
all input pins
control pins
data pins
IOFF
IHOLD
power-down output current
bus hold current nA input
IIK = −18 mA; VCC = 2.7 V
IOH = −100 µA;
VCC = 2.7 V to 3.6 V;
IOH = −8 mA; VCC = 2.7 V
IOH = −32 mA; VCC = 3.0 V
VCC = 2.7 V
IOL = 100 µA
IOL = 24 mA
VCC = 3.0 V
IOL = 16 mA
IOL = 32 mA
IOL = 64 mA
- −0.9 −1.2
VCC − 0.2 VCC − 0.1 -
2.4 2.5 -
2.0 2.2 -
- 0.1 0.2
- 0.3 0.5
- 0.25 0.4
- 0.3 0.5
- 0.4 0.55
VCC = 0 V or 3.6 V; VI = 5.5 V
VCC = 3.6 V; VCC or GND
VCC = 3.6 V; VI = VCC
VCC = 3.6 V; VI = 0 V
VCC = 0 V; VI or VO = 0 V to 4.5 V
VCC = 3 V; VI = 0.8 V
VCC = 3 V; VI = 2.0 V
VCC = 0 V to 3.6 V; VI = 3.6 V
-
-
[2] -
[2] -
-
[3] 75
−75
±500
1
±0.1
0.1
−1
1
150
−150
-
10
±1
1
−5
±100
-
-
-
Unit
V
V
V
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
µA
µA
9397 750 14703
Product data sheet
Rev. 05 — 10 February 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
5 of 15
5 Page 
Philips Semiconductors
74LVT125
3.3 V quad buffer; 3-state
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
y
Z
14
8
c
EA
X
HE v M A
pin 1 index
1
e
7
bp
wM
A2
A1
Q
(A3)
A
Lp
L
detail X
θ
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
D (1) E (2)
e
5.1
4.9
4.5
4.3
0.65
HE
6.6
6.2
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT402-1
MO-153
L Lp Q v w y Z (1) θ
1
0.75 0.4
0.50 0.3
0.2 0.13 0.1
0.72
0.38
8o
0o
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
Fig 11. Package outline TSSOP14 (SOT402-1)
9397 750 14703
Product data sheet
Rev. 05 — 10 February 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
11 of 15
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet 74LVT125.PDF ] | |
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