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PDF K8D1716U Data sheet ( Hoja de datos )
| Número de pieza | K8D1716U | |
| Descripción | 16M Dual Bank NOR Flash Memory | |
| Fabricantes | Samsung | |
| Logotipo |  |
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K8D1716UTB / K8D1716UBB
FLASH MEMORY
Document Title
16M Bit (2M x8/1M x16) Dual Bank NOR Flash Memory
Revision History
Revision No. History
0.0 Initial Draft
Draft Date
July 25, 2004
Remark
Advance
1 Revision 0.0
July 2004
1 page  
K8D1716UTB / K8D1716UBB
FLASH MEMORY
Table 3. Top Boot Block Address (K8D1716UT)
K8D1716UT
Block
A19
A18
A17
A16
A15
A14
A13
A12
Block Size
(KW/KB)
Address Range
Word Mode
Byte Mode
BA38
1
1
1
1
1
1
1
1
BA37
1
1
1
1
1
1
1
0
4/8
4/8
FF000H-FFFFFH
FE000H-FEFFFH
1FE000H-1FFFFFH
1FC000H-1FDFFFH
BA36
1
1
1
1
1
1
0
1
4 / 8 FD000H-FDFFFH 1FA000H-1FBFFFH
BA35
1
1
1
1
1
1
0
0
BA34
1
1
1
1
1
0
1
1
4/8
4/8
FC000H-FCFFFH
FB000H-FBFFFH
1F8000H-1F9FFFH
1F6000H-1F7FFFH
BA33
1
1
1
1
1
0
1
0
4 / 8 FA000H-FAFFFH 1F4000H-1F5FFFH
BA32
1
1
1
1
1
0
0
1
BA31
1
1
1
1
1
0
0
0
4/8
4/8
F9000H-F9FFFH
F8000H-F8FFFH
1F2000H-1F3FFFH
1F0000H-1F1FFFH
BA30
1
1 1 1 0XXX
32 / 64
F0000H-F7FFFH 1E0000H-1EFFFFH
BA29
BA28
1
1
1 1 0 1XXX
1 1 0 0XXX
32 / 64
32 / 64
E8000H-EFFFFH
E0000H-E7FFFH
1D0000H-1DFFFFH
1C0000H-1CFFFFH
Bank1
BA27
1
1 0 1 1XXX
32 / 64
D8000H-DFFFFH 1B0000H-1BFFFFH
BA26
BA25
1
1
1 0 1 0XXX
1 0 0 1XXX
32 / 64
32 / 64
D0000H-D7FFFH
C8000H-CFFFFH
1A0000H-1AFFFFH
190000H-19FFFFH
BA24
1
1 0 0 0XXX
32 / 64
C0000H-C7FFFH 180000H-18FFFFH
BA23
BA22
1
1
0 1 1 1XXX
0 1 1 0XXX
32 / 64
32 / 64
B8000H-BFFFFH
B0000H-B7FFFH
170000H-17FFFFH
160000H-16FFFFH
BA21
1
0 1 0 1XXX
32 / 64
A8000H-AFFFFH 150000H-15FFFFH
BA20
BA19
1
1
0 1 0 0XXX
0 0 1 1XXX
32 / 64
32 / 64
A0000H-A7FFFH
98000H-9FFFFH
140000H-14FFFFH
130000H-13FFFFH
BA18
1
0 0 1 0XXX
32 / 64
90000H-97FFFH 120000H-12FFFFH
BA17
BA16
1
1
0 0 0 1XXX
0 0 0 0XXX
32 / 64
32 / 64
88000H-8FFFFH
80000H-87FFFH
110000H-11FFFFH
100000H-10FFFFH
BA15
0
1 1 1 1XXX
32 / 64
78000H-7FFFFH 0F0000H-0FFFFFH
BA14
BA13
0
0
1 1 1 0XXX
1 1 0 1XXX
32 / 64
32 / 64
70000H-77FFFH
68000H-6FFFFH
0E0000H-0EFFFFH
0D0000H-0DFFFFH
BA12
0
1 1 0 0XXX
32 / 64
60000H-67FFFH 0C0000H-0CFFFFH
BA11
BA10
0
0
1 0 1 1XXX
1 0 1 0XXX
32 / 64
32 / 64
58000H-5FFFFH
50000H-57FFFH
0B0000H-0BFFFFH
0A0000H-0AFFFFH
BA9 0
1 0 0 1XXX
32 / 64
48000H-4FFFFH 090000H-09FFFFH
Bank2
BA8 0
BA7 0
1 0 0 0XXX
0 1 1 1XXX
32 / 64
32 / 64
40000H-47FFFH
38000H-3FFFFH
080000H-08FFFFH
070000H-07FFFFH
BA6 0
BA5 0
0 1 1 0XXX
0 1 0 1XXX
32 / 64
32 / 64
30000H-37FFFH
28000H-2FFFFH
060000H-06FFFFH
050000H-05FFFFH
BA4 0
0 1 0 0XXX
32 / 64
20000H-27FFFH 040000H-04FFFFH
BA3 0
BA2 0
0 0 1 1XXX
0 0 1 0XXX
32 / 64
32 / 64
18000H-1FFFFH
10000H-17FFFH
030000H-03FFFFH
020000H-02FFFFH
BA1 0
0 0 0 1XXX
32 / 64
08000H-0FFFFH 010000H-01FFFFH
BA0 0
0 0 0 0XXX
32 / 64
00000H-07FFFH 000000H-00FFFFH
Table 4. Secode Block Addresses for Top Boot Devices
Device
Block Address
A19-A12
K8D1716UT
11111xxx
Block
Size
64/32
(X8)
Address Range
1F0000H-1FFFFFH
(X16)
Address Range
F8000H-FFFFFH
5 Revision 0.0
July 2004
5 Page 
K8D1716UTB / K8D1716UBB
FLASH MEMORY
VID
A9
A6,A1,A0*
DQ15-DQ0
00H
ECH
01H
22A0H
or
22A2H
V = VIH or VIL
Manufacturer
Code
Device Code
(K8D1716U)
Return to
Read Mode
Note : The addresses other than A0 , A1 and A6 are Don′t care. Please refer to Table 9 for device code.
Figure 2. Autoselect Operation ( by high voltage method )
WE
A19∼A0(x16)/*
A19∼A-1(x8)
DQ15∼DQ0
555H/
AAAH
2AAH/
555H
555H/
AAAH
00H/
00H
01H/
02H
AAH
55H
90H
ECH
22oAr0H
22A2H
F0H
Manufacturer
Code
Device Code
(K8D1716U)
Return to
Read Mode
Note : The 3rd Cycle and 4th Cycle address must include the same bank address. Please refer to Table 9 for device code.
Figure 3. Autoselect Operation ( by command sequence method )
Write (Program/Erase) Mode
The K8D1716U executes its program/erase operations by writing commands into the command register. In order to write the com-
mands to the register, CE and WE must be low and OE must be high. Addresses are latched on the falling edge of CE or WE (which-
ever occurs last) and the data are latched on the rising edge of CE or WE (whichever occurs first). The device uses standard
microprocessor write timing.
Program
The K8D1716U can be programmed in units of a word or a byte. Programming is writing 0's into the memory array by executing the
Internal Program Routine. In order to perform the Internal Program Routine, a four-cycle command sequence is necessary. The first
two cycles are unlock cycles. The third cycle is assigned for the program setup command. In the last cycle, the address of the mem-
ory location and the data to be programmed at that location are written. The device automatically generates adequate program
pulses and verifies the programmed cell margin by the Internal Program Routine. During the execution of the Routine, the system is
not required to provide further controls or timings.
During the Internal Program Routine, commands written to the device will be ignored. Note that a hardware reset during a program
operation will cause data corruption at the corresponding location.
WE
A19∼A0(x16)/
A19∼A-1(x8)
DQ15-DQ0
RY/BY
555H/
AAAH
2AAH/
555H
555H/
AAAH
Program
Address
AAH
55H
A0H
Program
Data
Program
Start
Figure 4. Program Command Sequence
11 Revision 0.0
July 2004
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet K8D1716U.PDF ] | |
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