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PDF 74VHC04N Data sheet ( Hoja de datos )
| Número de pieza | 74VHC04N | |
| Descripción | Hex Inverter | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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February 2008
74VHC04
Hex Inverter
Features
■ High Speed: tPD = 3.8ns (typ.) at VCC = 5V
■ High noise immunity: VNIH = VNIL = 28% VCC (min.)
■ Power down protection is provided on all inputs
■ Low Noise: VOLP = 0.4V (typ.)
■ Low power dissipation: ICC = 2µA (max.) @ TA = 25°C
■ Pin and function compatible with 74HC04
General Description
The VHC04 is an advanced high speed CMOS Inverter
fabricated with silicon gate CMOS technology. It
achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation.
The internal circuit is composed of 3 stages including
buffer output, which provide high noise immunity and
stable output. An input protection circuit ensures that 0V
to 7V can be applied to the input pins without regard to
the supply voltage. This device can be used to interface
5V to 3V systems and two supply systems such as bat-
tery back up. This circuit prevents device destruction due
to mismatched supply and input voltages.
Ordering Information
Order Number
74VHC04M
74VHC04SJ
74VHC04MTC
74VHC04N
Package
Number
M14A
M14D
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1992 Fairchild Semiconductor Corporation
74VHC04 Rev. 1.3.0
www.fairchildsemi.com
1 page  
AC Electrical Characteristics
Symbol
Parameter
tPHL, tPLH Propagation Delay
CIN Input Capacitance
CPD Power Dissipation
Capacitance
VCC (V)
3.3 ± 0.3
5.0 ± 0.5
Conditions
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
VCC = OPEN
(3)
TA = 25°C
Min. Typ. Max.
5.0 7.1
7.5 10.6
3.8 5.5
5.3 7.5
4 10
18
TA = –40°C
to +85°C
Min. Max. Units
1.0 8.5 ns
1.0 12.0
1.0 6.5 ns
1.0 8.5
10 pF
pF
Note:
3. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load. Average operating current can be obtained by the equation:
ICC (opr.) = CPD • VCC • fIN + ICC / 6 (per gate).
©1992 Fairchild Semiconductor Corporation
74VHC04 Rev. 1.3.0
5
www.fairchildsemi.com
5 Page | ||
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| PDF Descargar | [ Datasheet 74VHC04N.PDF ] | |
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