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Número de pieza | 74VHC139 | |
Descripción | Dual 2-to-4 Decoder/Demultiplexer | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
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No Preview Available ! November 1992
Revised April 1999
74VHC139
Dual 2-to-4 Decoder/Demultiplexer
General Description
The VHC139 is an advanced high speed CMOS Dual 2-to-
4 Decoder/Demultiplexer fabricated with silicon gate
CMOS technology. It achieves the high speed operation
similar to equivalent Bipolar Schottky TTL while maintain-
ing the CMOS low power dissipation.
The active LOW enable input can be used for gating or it
can be used as a data input for demultiplexing applications.
When the enable input is held HIGH, all four outputs are
fixed at a HIGH logic level independent of the other inputs.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery back up. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
s High Speed: tPD = 5.0 ns (typ) at TA = 25°C
s Low power dissipation: ICC = 4 µA (Max.) at TA = 25°C
s High noise immunity: VNIH = VNIL = 28% VCC (Min.)
s Power down protection is provided on all inputs
s Pin and function compatible with 74HC139
Ordering Code:
Order Number
74VHC139M
74VHC139SJ
74VHC139MTC
74VHC139N
Package Number
Package Description
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Description
Pin Names
A0, A1
E
O0–O3
Truth Table
Description
Address Inputs
Enable Inputs
Outputs
Inputs
Outputs
E A0 A1 O0 O1 O2 O3
HX X H H H H
LL L L H H H
LH L H L H H
LL H H H L H
LH H H H H L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
© 1999 Fairchild Semiconductor Corporation DS011521.prf
www.fairchildsemi.com
1 page Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
5 www.fairchildsemi.com
5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet 74VHC139.PDF ] |
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