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M74ACT574B fiches techniques PDF

ST Microelectronics - OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING

Numéro de référence M74ACT574B
Description OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING
Fabricant ST Microelectronics 
Logo ST Microelectronics 





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M74ACT574B fiche technique
® 74ACT574
OCTAL D-TYPE FLIP FLOP
WITH 3 STATE OUTPUT NON INVERTING
s HIGH SPEED:
fMAX = 250 MHz (TYP.) at VCC = 3.3V
s LOW POWER DISSIPATION:
ICC = 8 µA (MAX.) at TA = 25 oC
s COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN), VIL = 0.8V (MAX)
s 50TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 574
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The ACT574 is an advanced high-speed CMOS
OCTAL D-TYPE FLIP FLOP with 3 STATE
OUTPUT NON INVERTING fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
These 8 bit D-Type flip-flops are controlled by a
clock input (CK) and an output enable input (OE).
On the positive transition of the clock, the Q
outputs will be set to logic state that were setup
at the D inputs.
PIN CONNECTION AND IEC LOGIC SYMBOLS
DIP
PACKAGE
DIP
SOP
TSSOP
SOP
TSSOP
ORDER CODES
T UB E
T&R
M74ACT574B
M74ACT574M M74ACT574MTR
M74ACT574TTR
While the (OE) input is low, the 8 outputs will be
in a normal logic state (high or low logic level)
and while high level the outputs will be in a high
impedance state.
The output control does not affect the internal
operation of flip flop; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.
The device is designed to interface directly High
Speed CMOS system with TTL and NMOS
components.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
February 2000
1/11

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