M74HC107 Datasheet PDF - ST Microelectronics
| Part Number | M74HC107 | |
| Description | DUAL J-K FLIP FLOP WITH CLEAR | |
| Manufacturers | ST Microelectronics | |
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M54HC107
M74HC107
DUAL J-K FLIP FLOP WITH CLEAR
. HIGH SPEED
fMAX = 75 MHz (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 2 µA (MAX.) AT TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
IOH = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS107
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M 54HC 10 7F 1R
M 74H C1 07 M1 R
M 74HC 10 7B 1R
M 74H C1 07 C1 R
DESCRIPTION
The M54/74HC107 is a high speed CMOS DUAL J-
K FLIP FLOP fabricated in silicon gate C2MOS tech-
nology. It has the same high speed performance of
LSTTL combined with true CMOS low power con-
sumption. These flip-flop are edge sensitive to the
clock input and change state on the negative going
transition of the clock pulse. Each one has inde-
pendent J, K, CLOCK, and CLEAR input and Q and
Q outputs. CLEAR is independent of the clock and
accomplished by a logic low on the input. All inputs
are equipped with protection circuits against static
discharge and transient excess voltage.
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN CONNECTIONS (top view)
October 1992
NC =
No Internal
Connection
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M54/M74HC107
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
Test Conditions
VCC
(V)
TA = 25 oC
54HC and 74HC
Min. Typ. Max.
Value
-40 to 85 oC
74HC
Min. Max.
-55 to 125 oC
54HC
Min. Max.
Unit
tTLH Output Transition 2.0
tTHL Time
4.5
30 75
8 15
95 110
19 22 ns
6.0 7 13 16 19
tPLH Propagation
tPHL Delay Time
(CK - Q, Q)
2.0
4.5
6.0
48 125 155 190
14 25 31 38 ns
12 21 26 32
tPLH Propagation
tPHL Delay Time
(CLR - Q, Q)
2.0
4.5
6.0
52 140 175 210
15 28 35 42 ns
13 24 30 36
fMAX Maximum Clock 2.0
Frequency
4.5
6.2 23
31 70
5.0 4.2
25 21 MHz
6.0 37 80 30 25
tW(H)
tW(L)
Minimum Pulse
Width
(CLOCK)
2.0
4.5
6.0
20 75
5 15
4 13
95 110
19 22 ns
16 19
tW(L) Minimum Pulse
Width
(CLR)
2.0
4.5
6.0
20 75
5 15
4 13
95 110
19 22 ns
16 19
ts Minimum Set-up 2.0
Time
4.5
28 75
7 15
95 110
19 22 ns
6.0 6 13 16 19
th Minimum Hold 2.0
Time
4.5
000
0 0 0 ns
6.0 0 0 0
tREM Minimum
Removal Time
(CLR)
2.0
4.5
6.0
25 30 40
5 6 8 ns
557
CIN Input Capacitance
5 10 10 10 pF
CPD (*) Power Dissipation
Capacitance
32
pF
(*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD •VCC •fIN + ICC/2 (per FLIP/FLOP)
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for M74HC107 electronic component. |
| Information | Total 11 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ M74HC107.PDF Datasheet ] | |
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