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MK2049-02 fiches techniques PDF

Integrated Circuit Systems - Communications Clock PLLs

Numéro de référence MK2049-02
Description Communications Clock PLLs
Fabricant Integrated Circuit Systems 
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MK2049-02 fiche technique
MK2049-02/03
Communications Clock PLLs
Description
The MK2049-02 and MK2049-03 are Phase-
Locked Loop (PLL) based clock synthesizers that
accept multiple input frequencies. With an 8 kHz
clock input as a reference, the MK2049-02/03
generate T1, E1, T3, E3, ISDN, xDSL, and other
communications frequencies. This allows for the
generation of clocks frequency-locked and phase-
locked to an 8 kHz backplane clock, simplifying
clock synchronization in communications systems.
The MK2049-02/03 can also accept a T1, E1, T3,
or E3 input clock and provide the same output for
loop timing. All outputs are frequency-locked
together and to the input.
These parts also have a jitter-attenuated buffer
capability. In this mode, the MK2049-02/03 are
ideal for filtering jitter from 27 MHz video clocks
or other clocks with high jitter.
ICS/MicroClock can customize these devices for
many other different frequencies. Contact your
ICS/MicroClock representative for more details.
Features
• Packaged in 20 pin SOIC
• Fixed input-output phase relationship on most
clock selections
• Meets the TR62411, ETS300 011, and GR-1244
specification for MTIE, Pull-in/Hold-in Range,
Phase Transients, and Jitter Generation for
Stratum 3, 4, and 4E
• Accept multiple inputs: 8 kHz backplane clock,
Loop Timing frequencies, or 10-28 MHz
• Lock to 8 kHz ±100 ppm (External mode)
• Buffer Mode allows jitter attenuation of
10–28 MHz input and x1/x0.5 or x2/x4 outputs
• Exact internal ratios enable zero ppm error
• Output clock rates include T1, E1, T3, E3, ISDN,
xDSL, and OC3 submultiples
• 5 V ±5% operation. Refer to MK2049-34 for 3.3 V
Block Diagram
VDD
4
GND
3
RESET
FS3:0 4
Clock
Input
Reference
Crystal X1
External/
Loop Timing
Mux
Crystal
Oscillator
PLL
Clock
Synthesis,
Control, and
Jitter
Attenuation
Circuitry
X2
CAP1
CAP2
Output
Buffer
Output
Buffer
Output
Buffer
CLK1
CLK2
CLK3
8 kHz
(External
Mode only)
MDS 2049-02/03 B
1
Revision 040601
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408)295-9800tel• www.icst.com

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