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GE28F128W30BD70 fiches techniques PDF

Intel - (GE28Fxxx Series) Wireless Flash Memory

Numéro de référence GE28F128W30BD70
Description (GE28Fxxx Series) Wireless Flash Memory
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GE28F128W30BD70 fiche technique
Intel® Wireless Flash Memory (W30)
28F640W30, 28F320W30, 28F128W30
Datasheet
Product Features
High Performance Read-While-Write/Erase
— Burst Frequency at 40 MHz
— 70 ns Initial Access Speed
— 25 ns Page-Mode Read Speed
— 20 ns Burst-Mode Read Speed
— Burst and Page Mode in All Blocks and
across All Partition Boundaries
— Burst Suspend Feature
— Enhanced Factory Programming:
3.5 µs per Word Program Time
— Programmable WAIT Signal Polarity
Flash Power
— VCC = 1.70 V – 1.90 V
— VCCQ = 2.20 V – 3.30 V
— Standby Current (0.13 µm) = 8 µA (typ.)
— Read Current = 7 mA
(4 word burst, typ.)
Flash Software
— 5 µs/9 µs (typ.) Program/Erase Suspend
Latency Time
— Intel® Flash Data Integrator (FDI) and
Common Flash Interface (CFI) Compatible
Quality and Reliability
— Operating Temperature:
–40 °C to +85 °C
— 100K Minimum Erase Cycles
— 0.13 µm ETOX™ VIII Process
— 0.18 µm ETOX™ VII Process
Flash Architecture
— Multiple 4-Mbit Partitions
— Dual Operation: RWW or RWE
— Parameter Block Size = 4-Kword
— Main block size = 32-Kword
— Top and Bottom Parameter Devices
Flash Security
— 128-bit Protection Register: 64 Unique Device
Identifier Bits; 64 User OTP Protection
Register Bits
— Absolute Write Protection with VPP at Ground
— Program and Erase Lockout during Power
Transitions
— Individual and Instantaneous Block Locking/
Unlocking with Lock-Down
Density and Packaging
— 0.13 µm: 32-, 64-, and 128-Mbit in VF BGA
Package; 64-, 128-Mbit in QUAD+ Package
— 0.18 µm: 32- and 128-Mbit Densities in VF
BGA Package; 64-Mbit Density in µBGA*
Package
— 56 Active Ball Matrix, 0.75 mm Ball-Pitch
— 16-bit Data Bus
The Intel®Wireless Flash Memory (W30) device combines state-of-the-art Intel® Flash
technology to provide the most versatile memory solution for high performance, low power,
board constraint memory applications. The W30 device offers a multi-partition, dual-operation
flash architecture that enables the device to read from one partition while programming or
erasing in another partition. This Read-While-Write or Read-While-Erase capability makes it
possible to achieve higher data throughput rates as compared to single partition devices,
allowing two processors to interleave code execution because program and erase operations can
now occur as background processes.
The W30 device incorporates a new Enhanced Factory Programming (EFP) mode to improve 12
V factory programming performance. This new feature helps eliminate manufacturing
bottlenecks associated with programming high density flash devices. Compare the EFP program
time of 3.5 µs per word to the standard factory program time of 8.0 µs per word and save
significant factory programming time for improved factory efficiency.
Additionally, the W30 device includes block lock-down and programmable WAIT signal
polarity, and is supported by an array of software tools. All these features make this product a
perfect solution for any demanding memory application.
Notice: This document contains information on new products in production. The specifications
are subject to change without notice. Verify with your local Intel sales office that you have the lat-
est datasheet before finalizing a design.
290702-010
May 2004

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