|
|
PDF NM9805 Data sheet ( Hoja de datos )
| Número de pieza | NM9805 | |
| Descripción | PCI + 1284 Printer Port | |
| Fabricantes | ETC | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de NM9805 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
|
No Preview Available !
Nm9805
PCI + 1284 Printer Port
Features
• Single 5V operation
• Low power
• PCI compatible 1284 printer port
• Multi-mode compatible controller (SPP, PS2, EPP,
ECP)
• Fast data rates up to 1.5 Mbytes/s (parallel port)
• 16-byte FIFO (parallel)
• Re-map function for legacy ports
• Microsoft Compatible
• Software programmable mode selects
• 128-pin QFP package
Applications
• Printer server
• Portable backup units
• Printer interface
• Add-on I/O cards
Application Notes
• AN-9805
General Description
Ordering Information
The Nm9805 is a 1284 parallel port controller with PCI
bus interface. Nm9805 fully supports the existing
Centronics printer interface as well as PS/2, EPP, and
ECP modes.
Commercial Grade
Nm9805CV
128-QFP 0° C to +70° C
The Nm9805 is ideally suited for PC applications, such
as high speed parallel ports. The Nm9805 is available
in a 128-pin QFP package. It is fabricated using an ad-
vanced submicron CMOS process to achieve low drain
power and high-speed requirements.
MosChip Semiconductor ♦ 3335 Kifer Rd, Santa Clara, CA 95051 ♦ Tel (408) 737-7141 ♦ Fax (408) 737-7708
1 page  
Nm9805
PCI + 1284 Printer Port
Pin Name 128
nSERR
30
PAR
31
nC/BE3
8
nC/BE2 22
nC/BE1 32
nC/BE0 43
nINTA
120
EE-CS
115
EE-CLK
EE-DI
EE-DO
EE-EN
116
118
117
123
Type
O
I/O
I
I
I
I
O
O
O
I
O
I
Description
actions except a special cycle. The minimum duration of nPERR is one clock
cycle.
System Error (open drain). This pin goes low when address parity errors are
detected.
Even Parity. Parity is even parity across AD31-0 and nC/BE3-0. PAR is stable
and valid one clock after the address phase. For data phase, PAR is stable
and valid one clock after either nIRDY is asserted on a write transaction, or
nTRDY is asserted on a read transaction.
Bus Command and Byte Enable. During the address phase of a transaction,
nC/BE3-0 defines the bus command. During data phase, nC/BE3-0 are used
as byte enables. nC/BE3 applies to byte “3”.
Bus Command and Byte Enable. During the address phase of a transaction,
nC/BE3-0 defines the bus command. During data phase, nC/BE3-0 are used
as byte enables. nC/BE2 applies to byte “2”.
Bus Command and Byte Enable. During the address phase of a transaction,
nC/BE3-0 defines the bus command. During data phase, nC/BE3-0 are used
as byte enables. nC/BE1 applies to byte “1”.
Bus Command and Byte Enable. During the address phase of a transaction,
nC/BE3-0 defines the bus command. During data phase, nC/BE3-0 are used
as byte enables. nC/BE0 applies to byte “0”.
PCI active low interrupt output (open-drain). This signal goes low (active)
when an interrupt condition occurs.
External EEprom chip select (active high). After power on reset, Nm9805
reads the EE-Prom and loads the read-only configuration registers sequen-
tially from the first 64 bytes in the EE-Prom.
External EEprom clock.
External EEprom data input.
External EEprom data output.
Enable/Disable external EEprom (active high, internal pull-up). External
EEprom can be disabled when this pin is tied to GND or pulled low. When
external EEprom is disabled, the default values for Nm9805 will be loaded
into PCI configuration register.
Rev. 1.1
Page 5
5 Page 
Nm9805
PCI + 1284 Printer Port
Config-B Register
Configuration B register. This register allows software
to control the selecting of interrupts. A read-write imple-
mentation implies a “software-configurable” device.
Reading this register returns the configured interrupt
and interrupt pin state. If a value is not set to 000 (the
jumper-default) then it is assumed that the value in the
register is correct and software will use the default in-
terrupt.
Config-B Bit-7:
Not used, set to “0”.
Config-B Bit-6:
0 = Configured printer interrupt pin is low.
1 = Configured printer interrupt pin is high.
Config-B Bit 7-0:
Interrupt pin select register.
Extended Control Register (ECR)
Mode “000”
SPP/Centronics/Compatible Mode
Forward direction only. The direction bit is forced to “0”
and PD7-PD0 are set to output direction. The Nm9805
is under software control. This mode defines the proto-
col used by most PCs to transfer data to a printer. It is
commonly called the Centronics mode and is the method
utilized with the standard parallel port. Data is placed
on the PD7-PD0 ports, the printer status is checked via
DSR register. If no error condition is flagged and printer
is not busy, software toggles the nSTROBE pin to latch
the PD7-PD0 data into printer. This operating cycle con-
tinues when printer/peripheral issues data acknowledge
signal (pulses the ACK and nBUSY pin).
Nibble Mode
The nibble mode is the most common way to get re-
verse channel data from a printer or peripheral. This
mode is usually combined with the Centronics mode or
a proprietary forward channel mode to create a bi-di-
rectional channel. In this mode printer status bits are
used as nibble bits.
This register controls the mode selection and DMA op- Bits order for nibble mode
eration.
Bit-7
0
0
0
0
1
1
1
1
Bit-6
0
0
1
1
0
0
1
1
Bit-5
0
1
0
1
0
1
0
1
Operating Mode
SPP
PS/2
PPF (FIFO mode)
ECP
EPP
Not used
FIFO test
Config A/B enable
Mode changes
After hardware reset, PS/2 mode is selected as default
mode. It is required to select mode 000 or 001 between
any other mode configuration.
PINS
nBUSY
PE
SLCT
nFAULT
nBUSY
PE
SLCT
nFAULT
DATA Bits
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
Mode “001”
PS/2, Byte Mode
The byte mode protocol is used to transfer bi-directional
data via PD7-PD0 ports without FIFO utilization. The
direction of the port is controlled with DIR bit in DCR
register. PS/2-byte use SPP protocol for data transfer.
DCR Bit-5:
0 = PD7-PD0 pins are out put mode.
1 = PD7-PD0 pins are input mode.
Rev. 1.1
Page 11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet NM9805.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| NM9805 | PCI + 1284 Printer Port | ETC |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |