MTB1N100E Datasheet PDF ( Pinout ) - TMOS POWER FET 1.0 AMPERES 1000 VOLTS

MTB1N100E Datasheet PDF - Motorola Semiconductors

Part Number	*MTB1N100E*
Description	TMOS POWER FET 1.0 AMPERES 1000 VOLTS
Manufacturers	Motorola Semiconductors
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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

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™Designer's Data Sheet

TMOS E-FET.™

High Energy Power FET

D2PAK for Surface Mount

N–Channel Enhancement–Mode Silicon Gate

The D2PAK package has the capability of housing a larger die

than any existing surface mount package which allows it to be used

in applications that require the use of surface mount components

with higher power and lower RDS(on) capabilities. This high voltage

MOSFET uses an advanced termination scheme to provide

enhanced voltage–blocking capability without degrading perfor-

mance over time. In addition, this advanced TMOS E–FET is

designed to withstand high energy in the avalanche and commuta-

tion modes. The new energy efficient design also offers a

drain–to–source diode with a fast recovery time. Designed for high

voltage, high speed switching applications in power supplies,

converters and PWM motor controls, these devices are particularly

well suited for bridge circuits where diode speed and commutating

safe operating areas are critical and offer additional safety margin

against unexpected voltage transients.

• Robust High Voltage Termination

• Avalanche Energy Specified

• Source–to–Drain Diode Recovery Time Comparable to a

Discrete Fast Recovery Diode

• Diode is Characterized for Use in Bridge Circuits

• IDSS and VDS(on) Specified at Elevated Temperature

• Short Heatsink Tab Manufactured — Not Sheared

• Specially Designed Leadframe for Maximum Power Dissipation

• Available in 24 mm 13–inch/800 Unit Tape & Reel, Add T4 Suffix to Part Number

MTB1N100E

Motorola Preferred Device

TMOS POWER FET

1.0 AMPERES

1000 VOLTS

RDS(on) = 9.0 OHM

CASE 418B–02, Style 2

D2PAK

MAXIMUM RATINGS (TC = 25°C unless otherwise noted)

Rating

Symbol

Value

Unit

Drain–Source Voltage

Drain–Gate Voltage (RGS = 1.0 MΩ)

Gate–Source Voltage — Continuous

Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms)

VDSS

VDGR

VGS

VGSM

1000

± 20

± 40

Vdc

Vpk

Drain Current — Continuous

Drain Current — Continuous @ 100°C

Drain Current — Single Pulse (tp ≤ 10 µs)

ID 1.0 Adc

ID 0.8

IDM 3.0 Apk

Total Power Dissipation

Derate above 25°C

Total Power Dissipation @ TA = 25°C, when mounted with the minimum recommended pad size

PD 75 Watts

0.6 W/°C

2.5 Watts

Operating and Storage Temperature Range

TJ, Tstg – 55 to 150 °C

Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C

(VDD = 25 Vdc, VGS = 10 Vdc, IL = 3.0 Apk, L = 10 mH, RG = 25 Ω)

EAS 45 mJ

Thermal Resistance — Junction to Case

Thermal Resistance — Junction to Ambient

Thermal Resistance — Junction to Ambient, when mounted with the minimum recommended pad size

RθJC

RθJA

1.67 °C/W

62.5

Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds

TL 260 °C

Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit

curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.

E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.

Thermal Clad is a trademark of the Bergquist Company.

Preferred devices are Motorola recommended choices for future use and best overall value.

REV 2

©MMoottoororolal,aInTc.M19O9S5 Power MOSFET Transistor Device Data

480

400

6 Q1

VGS 320

240

4 ID = 1 A 160

TJ = 25°C

2 80

0 12345

VDS

6 7 8 9 10 11 12 13 14 15

QG, TOTAL GATE CHARGE (nC)

Figure 8. Gate–To–Source and Drain–To–Source

Voltage versus Total Charge

1000

VDD = 500 V

ID = 1 A

VGS = 10 V

100 TJ = 25°C

td(off)

MTB1N100E

td(on)

1 10 100

RG, GATE RESISTANCE (OHMS)

Figure 9. Resistive Switching Time

Variation versus Gate Resistance

DRAIN–TO–SOURCE DIODE CHARACTERISTICS

1.0

VGS = 0 V

0.8 TJ = 25°C

0.6

0.4

0.2

0.50 0.54 0.58 0.62 0.66 0.70 0.74 0.78

VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)

Figure 10. Diode Forward Voltage versus Current

SAFE OPERATING AREA

The Forward Biased Safe Operating Area curves define

the maximum simultaneous drain–to–source voltage and

drain current that a transistor can handle safely when it is for-

ward biased. Curves are based upon maximum peak junc-

tion temperature and a case temperature (TC) of 25°C. Peak

repetitive pulsed power limits are determined by using the

thermal response data in conjunction with the procedures

discussed in AN569, “Transient Thermal Resistance–Gener-

al Data and Its Use.”

Switching between the off–state and the on–state may tra-

verse any load line provided neither rated peak current (IDM)

nor rated voltage (VDSS) is exceeded and the transition time

(tr,tf) do not exceed 10 µs. In addition the total power aver-

aged over a complete switching cycle must not exceed

(TJ(MAX) – TC)/(RθJC).

A Power MOSFET designated E–FET can be safely used

in switching circuits with unclamped inductive loads. For reli-

able operation, the stored energy from circuit inductance dis-

sipated in the transistor while in avalanche must be less than

the rated limit and adjusted for operating conditions differing

from those specified. Although industry practice is to rate in

terms of energy, avalanche energy capability is not a con-

stant. The energy rating decreases non–linearly with an in-

crease of peak current in avalanche and peak junction

temperature.

Although many E–FETs can withstand the stress of drain–

to–source avalanche at currents up to rated pulsed current

(IDM), the energy rating is specified at rated continuous cur-

rent (ID), in accordance with industry custom. The energy rat-

ing must be derated for temperature as shown in the

accompanying graph (Figure 12). Maximum energy at cur-

rents below rated continuous ID can safely be assumed to

equal the values indicated.

Motorola TMOS Power MOSFET Transistor Device Data

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MTB1N100E Datasheet PDF - Motorola Semiconductors

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