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Micrel Semiconductor - QUAD DIFFERENTIAL AND/NAND

Numéro de référence SY100E404
Description QUAD DIFFERENTIAL AND/NAND
Fabricant Micrel Semiconductor 
Logo Micrel Semiconductor 





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SY100E404 fiche technique
QUAD DIFFERENTIAL
AND/NAND
SY10E404
SY100E404
FEATURES
s Differential D and Q
s Extended 100E VEE range of –4.2V to –5.5V
s 700ps max. propagation delay
s High frequency outputs
s Internal 75Kinput pull-down resistors
s Fully compatible with Motorola 10E/100E404
s Available in 28-pin PLCC package
BLOCK DIAGRAM
D0a
D0a
D0b
D0b
D1a
D1a
D1b
D1b
D2a
D2a
D2b
D2b
D3a
D3a
D3b
D3b
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
DESCRIPTION
The SY10/100E404 are 4-bit differential AND/NAND
devices. The differential operation of these devices make
them ideal for pulse shaping applications where duty cycle
skew is critical. Special design techniques were
incorporated to minimize the skew between the upper
and lower level gate inputs.
Because a negative 2-input NAND function is
equivalent to a 2-input OR function, the differential inputs
and outputs of the devices also allow for their use as
fully differential 2-input OR/NOR functions.
The output RISE/FALL times of these devices are
significantly faster than most other standard ECLinPS
devices, resulting in an increased bandwidth.
The differential inputs have clamp structures which
will force the Q output of a gate in an open input condition
to go to a LOW state. Thus, inputs of unused gates can
be left open and will not affect the operation of the rest
of the device.
PIN CONFIGURATION
D2b
D2b
D2a
VEE
D2a
D1b
D1b
25 24 23 22 21 20 19
26 18
27 17
28
TOP VIEW
16
1
PLCC
15
2
J28-1
14
3 13
4 12
5 6 7 8 9 10 11
Q2
Q2
VCC
Q1
Q1
Q0
Q0
PIN NAMES
Pin
D[0:4], D[0:4]
Q[0:4], Q[0:4]
VCCO
Function
Differential Data Inputs
Differential Data Outputs
VCC to Output
Rev.: D Amendment: /1
1 Issue Date: February, 1998

PagesPages 4
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