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PDF STA027 Data sheet ( Hoja de datos )
| Número de pieza | STA027 | |
| Descripción | SBC Codec | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de STA027 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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STA027
SBC CODEC
PRODUCT PREVIEW
Features
■ Fully Integrated SBC Encoder And Decoder
■ Operating Modes:
– SBC encoder mode (PCM In/Serial Output)
– PCM input: 16, 32, 44.1, 48kHz
m– Channel Mode: Mono, Dual,
o– Stereo
.c– Subbands: 4 OR 8
– Allocation Methods:
– Loudness/SNR
U– SBC Decoder Mode
t4– Serial Input
– PCM Output: 16, 32, 44.1, 48kHz
e■ Digital Volume
■ Bass & Treble Control
e■ Serial Bitstream Input/output Interface up to
h2Mbit/s
■ Easy Programmable ADC Input Interface
S■ Serial PCM Output Interface (I2S and other
taFormats)
■ PLL for Internal Clock and for Output PCM
aClock Generation
.D■ I2C Control Bus
■ Low Power 2.4V CMOS Technology with 3.3V
Tolerant and Capable I/O
wApplications
w■ bluetooth AV Applications
w■ DVD Wirless Speaker Options
TQFP64
■ Wireless Audio Dongle
■ PC Wireless Speakers
■ Generic Compressed Audio LinkS
■ Wireless Headphone/Headsets
Description
STA027 is a fully integrated SBC codec targeting
wireless audio transmission such as DVD rear
channels wireless speakers, USB dongle, PC
wireless speakers. The device is fully controllable
through a standard I2C bus.
Compression Engine
SBC
The SBC Subband Coding engine can be used
when high quality audio is required in wireless
applications (such as Bluetooth). SBC is an audio
coding system specially designed for Bluetooth
AV applications to obtain high quality audio at
medium bit rates, and having a low computational
complexity. SBC uses 4 or 8 subbands, adaptive
bit allocation algorithm, and simple adaptive block
PCM quantizers..
.comOrder codes
t4UPart number
eSTA027
Package
TQFP64
Packing
Tube
www.DataSheSeptember 2005
CD00066274
Rev 1
1/44
www.st.com
44
1 page  
STA027
1 Typical application circuit and block diagram
1 Typical application circuit and block diagram
1.1 Block diagram
Figure 1. Block diagram
BSI_BCK
BSI_DATA
DREQ
BCKI
SDI
LRCKI
RQST
SDI
I/F
I2S IN
I/F
SCL
SDA
I2C
I/F
INPUT BUFFER
MMDSP
CORE
SBC CODEC
PCM OUTPUT
BUFFER
SDO
I/F
GPSO
I/F
I2S OUT
I/F
BSO_LRCK
BSO_DATA
BSO_BCK
GPSO_CK
GPSO_SDO
GPSO_REQ
BCKO
SDO
LRCKO
I2C
REG BANK
SYSTEM
PLL
OSCK
AUDIO
PLL
OSC
XTI XTO
D05AU1615
1.2 Typical bluetooth wireless audio application
Figure 2. Transmitter block diagram
L
ADC
R
ENCODER
I2S IN
I/F
SDO
I/F
STA027
BT
MODULE
Figure 3. Receiver block diagram
BT
MODULE
DECODER
SDI I2S OUT
I/F I/F
STA027
D05AU1616
DAC
L
R
Note:
D05AU1617
for Bluetooth chipset please refer to following device: SLTLC2416, STLC2150, STLC2500. For
ADC and DAC solutions please refer to following devices: STW5094, STW5095, TDA7535.
CD00066274
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5 Page 
STA027
4 Host register
4 Host register
The following table gives a description of STA027 register list.
The STA027 device includes 256 I2C registers. In this document, only the user-oriented registers are
described. The undocumented registers are reserved or unused. These registers must never be
accessed (in Read or in Write mode). The Read-Only registers must never be written
We can split the data flux in different time periods (see following diagram) meanwhile host registers can
be read or written :
● DWT : During Whole Time (at any time during process).
● DEC : During External Config (period between RUN=2 and RUN=1).
● DBO : During Boot (period between RUN=0 and RUN=2).
● ABO : After BOot (period after RUN=1).
● AEC : After External Config (period after RUN=2).
● EDF : Every Decoded Frame (each time a frame has been decoded).
● EDB : Every Decoded Block (each time a block has been decoded).
Figure 5.
SOFT_RESET = 1
CK_CMD = 0
HR RUN==0 RUN==2 RUN==1
block1
frame1
block2
frame1
block1
frame2
time
DBO
DEC
D01AU1260
DWT
EDB
EDB
EDF
ABO
AEC
EDB
CD00066274
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11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet STA027.PDF ] | |
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