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MC74AC256 fiches techniques PDF

Motorola Semiconductors - DUAL 4-BIT ADDRESSABLE LATCH

Numéro de référence MC74AC256
Description DUAL 4-BIT ADDRESSABLE LATCH
Fabricant Motorola Semiconductors 
Logo Motorola Semiconductors 





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MC74AC256 fiche technique
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MC74AC256
MC74ACT256
Dual 4ĆBit Addressable Latch
The MC74AC256/74ACT256 dual addressable latch has four distinct modes
of operation which are selectable by controlling the Clear and Enable inputs
(see Function Table). In the addressable latch mode, data at the Data (D) inputs
is written into the addressed latches. The addressed latches will follow the Data
input with all unaddressed latches remaining in their previous states.
In the memory mode, all latches remain in their previous states and are
unaffected by the Data or Address inputs. To eliminate the possibility of entering
erroneous data in the latches, the enable should be held HIGH (inactive) while
the address lines are changing. In the dual 1-of-4 decoding or demultiplexing
mode (MR = E = LOW), addressed outputs will follow the level of the D inputs
with all other outputs LOW. In the clear mode, all outputs are LOW and unaffected
by the Address and Data inputs.
Combines Dual Demultiplexer and 8-Bit Latch
Serial-to-Parallel Capability
Output from Each Storage Bit Available
Random (Addressable) Data Entry
Easily Expandable
Common Clear Input
Useful as Dual 1-of-4 Active HIGH Decoder
VCC MR E Db Q3b Q2b Q1b Q0b
16 15 14 13 12 11 10 9
DUAL 4-BIT
ADDRESSABLE
LATCH
N SUFFIX
CASE 648-08
PLASTIC
D SUFFIX
CASE 751B-05
PLASTIC
12345678
A0 A1 Da Q0a Q1a Q2a Q3a GND
LOGIC SYMBOL
Da Db
A0
E
A1 MR
Q0a Q1a Q2a Q3a Q0b Q1b Q2b Q3b
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FACT DATA
5-1
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