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PDF STP6NK90ZFP Data sheet ( Hoja de datos )

Número de pieza STP6NK90ZFP
Descripción N-CHANNEL MOSFET
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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No Preview Available ! STP6NK90ZFP Hoja de datos, Descripción, Manual

STP6NK90Z - STP6NK90ZFP
STB6NK90Z - STW7NK90Z
N-channel 900V - 1.56- 5.8A - TO-220/TO-220FP/D2PAK/TO-247
Zener-protected SuperMESH™ Power MOSFET
Features
Type
STP6NK90Z
STP6NK90ZFP
STB6NK90Z
STW7NK90Z
VDSS
900 V
900 V
900 V
900 V
RDS(on)
<2
<2
<2
<2
ID
5.8 A
5.8 A
5.8 A
5.8 A
Extremely high dv/dt capability
100% avalanche tested
Gate charge minimized
Very low intrinsic capacitances
Very good manufacturing repeatability
Description
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt
capability for the most demanding applications.
Such series complements ST full range of high
voltage MOSFETs.
Application
Switching application
TO-220
3
2
1
TO-220FP
3
1
D2PAK
TO-247
Internal schematic diagram
Order codes
Part number
STP6NK90Z
STP6NK90ZFP
STB6NK90ZT4
STW7NK90Z
April 2007
Marking
P6NK90Z
P6NK90ZFP
B6NK90Z
W7NK90Z
Package
TO-220
TO-220FP
D2PAK
TO-247
Rev 5
Packaging
Tube
Tube
Tape e reel
Tube
1/18
www.st.com
18

1 page




STP6NK90ZFP pdf
STP6NK90Z - STP6NK90ZFP - STB6NK90Z - STW7NK90Z
2 Electrical characteristics
Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 5. On/off states
Symbol
Parameter
V(BR)DSS
Drain-source
Breakdown voltage
IDSS
Zero gate voltage
Drain current (VGS = 0)
IGSS
Gate-body leakage
Current (VDS = 0)
VGS(th) Gate threshold voltage
RDS(on)
Static drain-source on
resistance
Test conditions
Min. Typ. Max. Unit
ID =1mA, VGS = 0
900
VDS = Max Rating
VDS = Max Rating, TC = 125°C
V
1 µA
50 µA
VGS = ± 20 V
VDS = VGS, ID = 100 µA
VGS = 10 V, ID = 2.9 A
± 10 µA
3 3.75 4.5
1.56 2
V
Table 6. Dynamic
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
gfs (1) Forward transconductance VDS = 15v, ID = 2.9 A
5S
Ciss
Coss
Crss
Input capacitance
Output capacitance
VDS = 25 V, f = 1 MHz,
Reverse transfer capacitance VGS = 0
1350
130
26
pF
pF
pF
Coss eq. (2) Equivalent output
capacitance
VDS =0V, VDS = 0V to 720V
70
pF
td(on)
tr
tr(off)
tr
Turn-on delay time
Rise time
Turn-off delay time
Fall time
VDD = 450 V, ID = 3 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 20)
17 ns
45 ns
20 ns
20 ns
Qg Total gate charge
Qgs Gate-source charge
Qgd Gate-drain charge
VDD = 720 V, ID = 5.8 A,
VGS = 10 V
46.5 60.5
8.5
25
nC
nC
nC
Tr(Voff)
Tr
Tc
Off-voltage rise time
Fall time
Cross-over time
VDD = 720 V, ID = 5.8 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 22)
11 ns
12 ns
20 ns
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS.
5/18

5 Page





STP6NK90ZFP arduino
STP6NK90Z - STP6NK90ZFP - STB6NK90Z - STW7NK90Z
4 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
11/18

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