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PDF BH62UV8000 Data sheet ( Hoja de datos )
| Número de pieza | BH62UV8000 | |
| Descripción | Ultra Low Power/High Speed CMOS SRAM | |
| Fabricantes | Brilliance Semiconductor | |
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BSI Ultra Low Power/High Speed CMOS SRAM
1M X 8 bit
BH62UV8000
n FEATURES
Ÿ Wide VCC low operation voltage : 1.65V ~ 3.6V
Ÿ Ultra low power consumption :
VCC = 3.0V
Operation current : 5.0mA at 70ns at 25OC
1.5mA at 1MHz at 25OC
Standby current : 2.5uA at 25OC
VCC = 2.0V Data retention current : 2.5uA at 25OC
Ÿ High speed access time :
-70 70ns at 1.8V at 85OC
Ÿ Automatic power down when chip is deselected
Ÿ Easy expansion with CE1, CE2 and OE options
Ÿ Three state outputs and TTL compatible
Ÿ Fully static operation, no clock, no refreash
Ÿ Data retention supply voltage as low as 1.0V
n DESCRIPTION
The BH62UV8000 is a high performance, ultra low power CMOS Static
Random Access Memory organized as 1,048,576 by 8 bits and
operates in a wide range of 1.65V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with typical operating current of 1.5mA at
1MHz at 3.6V/25OC and maximum access time of 70ns at 1.8V/85OC.
Easy memory expansion is provided by an active LOW chip enable
(CE1), an active HIGH chip enable (CE2) and active LOW output
enable (OE) and three-state output drivers.
The BH62UV8000 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BH62UV8000 is available in DICE form and 48-ball BGA package.
n PRODUCT FAMILY
PRODUCT
FAMILY
OPERATING
TEMPERATURE
VCC
RANGE
SPEED
(ns)
VCC=1.8~3.6V
POWER CONSUMPTION
STANDBY
(ICCSB1, Max)
Operating
(ICC, Max)
VCC=3.6V VCC=1.8V VCC=3.6V VCC=1.8V
PKG TYPE
BH62UV8000AI
BH62UV8000DI
+0OC to +70OC
-25OC to +85OC
n PIN CONFIGURATIONS
1.65V ~ 3.6V
70 13uA 10uA 10mA 7mA
BGA-48-0608
DICE
70 15uA 12uA 10mA 7mA
DataSheet4U.com
n BLOCK DIAGRAM
DataShee
123456
A NC OE A0 A1 A2 CE2
B NC NC A3 A4 CE1 NC
C DQ0 NC A5 A6 NC D04
D VSS DQ1 A17 A7 DQ5 VCC
E VCC DQ2 VSS A16 DQ6 VSS
F D3 NC A14 A15 NC DQ7
G NC NC A12 A13 WE NC
H
A18 A8
A9 A10 A11 A19
48-ball BGA top view
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CE1
CE2
WE
OE
VCC
GND
Address
Input
Buffer
10
Row
Decoder
1024
Memory Array
1024 x 18192
8
8
Control
Data
Input
Buffer
Data
Output
Buffer
8
8
8192
Column I/O
Write Driver
Sense Amp
1024
Column Decoder
10
Address Input Buffer
A19 A18 A17 A15 A14 A13 A16 A2 A1 A0
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.
Detailed product characteristic test report is available upon request and being accepted.
DataSheet4U.com
R0201-BH62UV8000
1
Revision 1.0
Jul. 2005
DataSheet4 U .com
1 page  
www.DataSheet4U.com
BSI
n SWITCHING WAVEFORMS (READ CYCLE)
READ CYCLE 1 (1,2,4)
ADDRESS
DOUT
tAA
tOH
tRC
READ CYCLE 2 (1,3,4)
CE1
tACS1
CE2
et4U.com
DOUT
READ CYCLE 3 (1, 4)
ADDRESS
OE
CE1
CE2
DOUT
tACS2
tCLZ(5)
DataSheet4U.com
tRC
tAA
tOE
tOLZ
tCLZ1(5)tACS1
tACS2
tCLZ2(5)
NOTES:
1. WE is high in read Cycle.
2. Device is continuously selected when CE1 = VIL and CE2= VIH.
3. Address valid prior to or coincident with CE1 transition low and/or CE2 transition high.
4. OE = VIL.
5. Transition is measured ± 500mV from steady state with CL = 5pF.
The parameter is guaranteed but not 100% tested.
DataSheet4U.com
R0201-BH62UV8000
5
DataSheet4 U .com
BH62UV8000
tOH
tCHZ1, tCHZ2(5)
DataShee
tOH
tOHZ(5)
tCHZ1(1,5)
tCHZ2(2,5)
Revision 1.0
Jul. 2005
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet BH62UV8000.PDF ] | |
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