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PDF SN250 Data sheet ( Hoja de datos )
| Número de pieza | SN250 | |
| Descripción | Single-chip ZigBee/802.15.4 solution | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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SN250
Single-chip ZigBeeTM/802.15.4 solution
Preliminary Data
Features
■ Integrated 2.4GHz, IEEE 802.15.4-compliant
transceiver:
– Robust RX filtering allows co-existence
with IEEE 802.11g and Bluetooth devices
– − 97dBm RX sensitivity (1% PER, 20byte
packet)
– + 3dBm nominal output power
– Increased radio performance mode (boost
mode) gives − 98dBm sensitivity and +
5dBm transmit power
– Integrated VCO and loop filter
■ Integrated IEEE 802.15.4 PHY and lower MAC
with DMA
■ Integrated hardware support for Packet Trace
Interface for InSight Development Environment
■ Provides integrated RC oscillator for low power
operation
■ Supports optional 32.768kHz crystal oscillator
for higher accuracy needs
■ 16-bit XAP2b microprocessor
■ Integrated memory:
– 128kB of Flash
– 5kB of SRAM
■ Configurable memory protection scheme
■ Two sleep modes:
– Processor idle
– Deep sleep—1.0μA (1.5μA with optional
32.768kHz oscillator enabled)
■ Seventeen GPIO pins with alternate functions
■ Two Serial Controllers with DMA
– SC1: I2C master, SPI master, UART
– SC2: I2C master, SPI master/slave
■ Two 16-bit general-purpose timers; one 16-bit
sleep timer
■ Watchdog timer and power-on-reset circuitry
■ Non-intrusive debug interface (SIF)
■ Integrated AES encryption accelerator
■ Integrated ADC module first-order, sigma-delta
converter with 12-bit resolution
■ Integrated 1.8V voltage regulator
July 2006
Rev 1.0
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
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SN250
1
General description
General description
The SN250 is a single-chip solution that integrates a 2.4GHz, IEEE 802.15.4-compliant
transceiver with a 16-bit XAP2b microprocessor. It contains integrated Flash and RAM
memory and peripherals of use to designers of ZigBee-based applications.
The transceiver utilizes an efficient architecture that exceeds the dynamic range
requirements imposed by the IEEE 802.15.4-2003 standard by over 15dB. The integrated
receive channel filtering allows for co-existence with other communication standards in the
2.4GHz spectrum such as IEEE 802.11g and Bluetooth. The integrated regulator, VCO, loop
filter, and power amplifier keep the external component count low. An optional high
performance radio mode (boost mode) is software selectable to boost dynamic range by a
further 3dB.
The XAP2b microprocessor is a power-optimized core integrated in the SN250. It supports
two different modes of operation—System Mode and Application Mode. The ZNet stack
runs in System Mode with full access to all areas of the chip. Application code runs in
Application Mode with limited access to the SN250 resources; this allows for the scheduling
of events by the application developer while preventing modification of restricted areas of
memory and registers. This architecture results in increased stability and reliability of deployed
solutions.
The SN250 has 128kB of embedded Flash memory and 5kB of integrated RAM for data and
program storage. The SN250 software stack employs an effective wear-leveling algorithm in
order to optimize the lifetime of the embedded Flash.
To maintain the strict timing requirements imposed by ZigBee and the IEEE 802.15.4-2003
standard, the SN250 integrates a number of MAC functions into the hardware. The MAC
hardware handles automatic ACK transmission and reception, automatic backoff delay, and
clear channel assessment for transmission, as well as automatic filtering of received
packets. In addition, the SN250 allows for true MAC level debugging by integrating the
Packet Trace Interface.
To support user-defined applications, a number of peripherals such as GPIO, UART, SPI,
I2C, ADC, and general-purpose timers are integrated. Also, an integrated voltage regulator,
power-on-reset circuitry, sleep timer, and low-power sleep modes are available. The deep
sleep mode draws less than 1μA, allowing products to achieve long battery life.
Finally, the SN250 utilizes the non-intrusive SIF module for powerful software debugging
and programming of the XAP2b microcontroller.
Target applications for the SN250 include:
● Building automation and control
● Home automation and control
● Home entertainment control
● Asset tracking
The SN250 is purchased with ZNet, a ZigBee-compliant software stack codeveloped by
Ember Corporation and STMicroelectronics, providing a ZigBee profile-ready, platform-
compliant solution.This technical datasheet details the SN250 features available to
customers using it with the ZNet stack.
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SN250
Pin assignment
Table 1. Pin descriptions (continued)
Pin # Signal
Direction Description
Digital I/O
GPIO15
I/O
(enable GPIO15 with GPIO_CFG[2])
TMR1OA
41
TMR2IA.3
O
I
Waveform Output A of Timer 1
(enable TMR1OA with GPIO_CFG[2])
Capture Input A of Timer 2
(enable CAP2-2 with GPIO_CFG[7:4])
IRQC I External interrupt source C
Digital I/O
GPIO14
I/O
(enable GPIO14 with GPIO_CFG[1])
TMR2OB
42
O
Waveform Output B of Timer 2
(enable TMR2OB with GPIO_CFG[1])
TMR1IB.3
I
Capture Input B of Timer 1
(enable CAP1-2 with GPIO_CFG[7:4])
IRQB
I External interrupt source B
Digital I/O
GPIO13
I/O
(enable GPIO13 with GPIO_CFG[0])
43 TMR2OA
O
Waveform Output A of Timer 2
(enable TMR2OA with GPIO_CFG[0])
TMR1IA.3
I
Capture Input A of Timer 1
(enable CAP1-2 or CAP1-2h with GPIO_CFG[7:4])
44 VDD_CORE Power 1.8V digital core supply
45 VDD_PRE
Power
1.8V prescaler supply
46 VDD_SYNTH Power 1.8V synthesizer supply
47 OSCB
I/O
24MHz crystal oscillator or left open when using external clock input on
OSCA
48 OSCA
49 GND
I/O
Ground
24MHz crystal oscillator or external clock input
Ground supply pad in the bottom center of the package forms Pin 49 (see
the SN250 Reference Design for PCB considerations)
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| PDF Descargar | [ Datasheet SN250.PDF ] | |
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