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MTV118 fiches techniques PDF

Myson - On-Screen-Display

Numéro de référence MTV118
Description On-Screen-Display
Fabricant Myson 
Logo Myson 





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MTV118 fiche technique
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MYSON
MTV118
TECHNOLOGY
On-Screen-Display for LCD Monitor
FEATURES
• Horizontal sync input may be up to 120 KHz.
• Acceptable wide-range pixel clock up to 96MHz
from XIN pin.
• Full-screen display consists of 15 (rows) by 30 (col-
umns) characters.
• 12 x 18 dot matrix per character.
• Total of 256 characters and graphic fonts including
248 mask ROM fonts and 8 programmable RAM
fonts.
• 8 color selection maximum per display character.
• Double character height and/or width control.
• Programmable positioning for display screen cen-
ter.
• Bordering, shadowing and blinking effect.
• Programmable vertical character height (18 to 71
lines) control.
• Row to row spacing register to manipulate the con-
stant display height.
• 4 programmable background windows with multi-
level operation.
• Software clears for display frame.
• Half tone and fast blanking output.
• 8-channel/8-bit PWM D/A converter output.
• Compatible with SPI bus or I2C interface with
address 7AH (slave address is mask option).
• 16 or 24-pin PDIP/SOP package.
BLOCK DIAGRAM
GENERAL DESCRIPTION
MTV118 is designed for LCD monitor appli-
cations to display the built-in characters or fonts
onto an LCD monitor screen. The display oper-
ates by transferring data and control information
from the micro controller to the RAM through a
serial data interface. It can execute full screen
displays automatically and specific functions such
as character bordering, shadowing, blinking, dou-
ble height and width, font by font color control,
frame positioning, frame size control by character
height and windowing effect. Moreover, MTV118
also provides 8 PWM DAC channels with 8-bit
resolution and a PWM clock output for external
digital-to-analog control.
SSB
SCK
SDA
VFLB
HFLB
NC
XIN
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
SERIAL DATA
INTERFACE
8DATA
9ROW, COL
ACK
ARWDB
HDREN
VDREN
NROW
ADDRESS BUS
ADMINISTRATOR
5 RCADDR
9 DADDR
9 FONTADDR
5 WINADDR
5 PWMADDR
VSP CH 7
CHS
VERTD 8
VERTICAL
DISPLAY
CONTROL
5 LPN
NROW
VDREN
HORIZONTAL
ARWDB
HSP HORD 8 DISPLAY CONTROL HDREN
CLOCK
GENERATOR
VCLKX
PWM D/A
CONVERTER
8 DATA
DATA 8
CWS
CHS
DISPLAY & ROW
CONTROL
REGISTERS
LUMAR
LUMAG
LUMAB
BLINK
8 CRADDR
DATA 8
LPN 5
CWS
VCLKS
CHARACTER ROM LUMA
USER FONT RAM
BORDER
LUMINANCE &
BORDGER
GENERATOR
DATA 8
8 VERTD
8 HORD
7 CH
WINDOWS &
FRAME
CONTROL
BSEN
SHADOW
OSDENB
HSP
VSP
LUMAR
LUMAG
LUMAB
BLINK
VCLKX
COLOR
ENCODER
POWER ON
PRB
RESET
VDD
VSS
VDDA
VSSA
ROUT
GOUT
BOUT
FBKG
HTONE
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification
without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of
the product.
1/15
MTV118 Revision 2.0 01/01/1999
DataSheet4 U .com

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