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PDF ATR0600 Data sheet ( Hoja de datos )
| Número de pieza | ATR0600 | |
| Descripción | GPS Front - End IC | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Very Low Power Design (≈ 50 mW)
• Single IF Concept
• 2-bit ADC on Chip
• Small QFN Package (28 Pins)
• Highly Integrated, Few External Components
• UHF6 Technology
Electrostatic sensitive device.
Observe precautions for handling.
Description
With the growing importance of mobile communication, location awareness is a key
feature for more and more products and services. Due to its small size and minimal
power consumption, the GPS front-end IC ATR0600 is an ideal solution for mobile
applications and navigation systems.
Figure 1. Block Diagram
1575.42 MHz
Ant
LNA
RFIN
SAW
RFNIN
96.76 MHz
LC-BP
VS3 BP NBP BPI
NBPI
REF
VDIG
VCO
1478.6
MHz
64
1
1
4
PFD
VGA amp
BP-Filter
OR
XTO
Power
control
Dig. IF at 4.35 MHz
SIGH
SIGL
SC 23.104 MHz
AGCO
GC
P2
VS1 VS2 VS5 VS7 X XTO
NXTO NX P1
23.104 MHz
GPS
Front-end IC
ATR0600
Preliminary
DataSheet4 U .com
Rev. 4536F–GPS–10/03
1 page  
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ATR0600 [Preliminary]
Electrical Characteristics (Continued)
No. Parameters
Test Conditions
Pin Symbol Min.
Typ.
Max.
Unit
2 Mixer and 1st IF-filter
2.1 Output frequency
fref = 23.104 MHz
2.2 Input impedance
fref = 1575 MHz
3 VGA and 2nd IF-filter
15, 16
12, 13
fIF
Zin, IF
96.76
13 - j80
MHz
W
3.1
Bandpass center
frequency
fref = 23.104 MHz
fin, VGA
96.76
MHz
3.2 Minimum gain
3.3 Maximum gain
3.4
Control-voltage
sensitivity
3.5
Gain-control output
cut-off frequency
VGC = 1.0 V
VGC = 2.2 V
VGC = 2.2 V
VGC = 1.0 V
Without external load
GVGA, min
GVGA, max
Nvga, min
Nvga, max
Fagc_out
0
75
6.6
150
100
dB
dB
dB/V
dB/V
kHz
3.6
Gain-control output
voltage
at 50 pF load
1 Vagc_out 1.0
2.2 V
4 Reference Oscillator
4.1
XTO phase noise
at 100 Hz
28 Pn100
-80 dBc/Hz
4.2
XTO phase noise
at 1 kHz
28 Pn1k
-100 dBc/Hz
5 Clock and Data Driver
5.1
Clock driver
frequency
28 fclk
23.104
MHz
5.2 Clock output level
Cload = 10 pF
5.3 Clock output level
Cload = 10 pF
5.4 Data output level
Cload = 10 pF
5.5 Data output level
Cload = 10 pF
6 Power-up, Pins P1 and P2
28 Vclkhigh
28 Vclklow
25, 26 Vdatahigh
25, 26
Vdatalow
0.8 ´
VDD
0.2 ´
VDD
0.8 ´
VDD
0.2 ´
VDD
V
V
V
V
6.1
Power-on voltage
level on
9, 10
VPUon
0.9
V
6.2
Power-on voltage
level off
9, 10
VPUoff
0.3 V
6.3 Power-on delay time
9, 10 TPUon, off
6 µs
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Type*
B
C
D
D
D
D
D
B
C
C
A
B, C
C
C
C
C
C
C
4536F–GPS–10/03
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Literature Requests
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Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard
warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any
errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and
does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are
granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use
as critical components in life support devices or systems.
© Atmel Corporation 2003. All rights reserved.
Atmel® and combinations thereof are the registered trademarks of Atmel Corporation or its subsidiaries.
Other terms and product names may be the trademarks of others.
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4536F–GPS–10/03
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| PDF Descargar | [ Datasheet ATR0600.PDF ] | |
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