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PDF ATR0620 Data sheet ( Hoja de datos )
| Número de pieza | ATR0620 | |
| Descripción | GPS BASEBAND PROCESSOR | |
| Fabricantes | ATMEL Corporation | |
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Features
• Utilizes the ARM7TDMI™ ARM® Thumb® Processor Core
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Embedded ICE (In-circuit Emulation)
• 128 Kbytes Internal RAM
• Fully Programmable External Bus Interface (EBI)
– Maximum External Address Space of 64 MB
– Up to Four Chip Selects
– Software Programmable 8-/16-bit External Data Bus
• 16-channel GPS Correlator
– Accuracy: TBD
– Time to First Fix: TBD
• 8-channel Peripheral Data Controller (PDC)
• 8-level Priority, Individually Maskable, Vectored Interrupt Controller
– Three External Interrupts
• 20 Programmable I/O Lines
• Three USARTs
– Two Dedicated Peripheral Data Controller (PDC) Channels per USART
• Master/Slave SPI Interface
– Two Dedicated Peripheral Data Controller (PDC) Channels
– 8- to 16-bit Programmable Data Length
– Four External Slave Chip Selects
• Programmable Watchdog Timer
• Power Management Controller (PMC)
– CPU and Peripherals Can Be Deactivated Individually
• Clock Manager (CLM)
– Geared Master Clock to Reduce Power Consumption
– Sleep State with Disabled Master Clock
• PWM Controller
– Two PWM Signals
• Real Time Clock (RTC)
– Time in GPS Format and 15-bit Fractional Part of a Second
– Programmable Interrupt
– Timer with a 8-bit Fractional Part of a Second and Parallel Load
• 2.3V to 3.6V or 1.8V Supply Voltage
• Includes Power Supervisor
• Battery Backup Memory
• 9 mm × 9 mm 100-pin BGA Package
GPS Baseband
Processor
ATR0620
Summary
Preliminary
DataSheet4 U .com
Rev. 4574CS–GPS–05/05
1 page  
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Table 1-1. Pin Configuration (Continued)
Serial
Number
BGA 100
CPGA 144
Pin Name
46 B5 B7 EM_A6
47 B4 A3 EM_A7
48 B2 B1 EM_A8
49 D4 F2 EM_A9
50 C2
F3 EM_A10
51 D6
A9 EM_A11
52 D7
C10 EM_A12
53 C3
C1 EM_A13
54 C1
E2 EM_A14
55 D5
A4 EM_A15
56 C6
C7 EM_A16
57 F8
H13 EM_A17
58 B3
C4 EM_A18
59 C5
C6 EM_A19
60 E5
Q1 VDD18_R
61 E6
A1 VDD18_B
62 F7
K15 VDD18_L2
63 F6
A15 VDD18_L1
64 J7
P13
VBAT
65 A1 D3 GND_R
66 A10
C12
GND_B
67 K1 N4 GND_T
68 F10
J15
GND_L
69 K10 M13 GND_BAT
70 H1
N2
P24
71 D1
G3
P25
72 H3
P5
P23
73 G8 M15
P26
74 J8
N13
P9
75 H7
N12 LDO_EN
76 H6
Q13 LDO_OUT
77 H5 P9 P3 (OH)
78 A7
B9 P4 (OH)
79 B1
D2 P5 (OH)
80 A8
A13 P6 (OH)
81 K7
P12 LDO_IN
82 D2 G1 P7 (OH)
83 E4
H2 P10 (OH)
84 H10
L13
P11
85 G2
L3
P8
86 E1
H3
P16
87 F1
J2
P19
88 G3
M3
P1
89 K8
Q14 LDOBAT_IN
90 F2
K3
P21
91 H8 M14
P22
Note: 1. No selection option for PIO.
Firmware
Label
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
GPSMODE8
GPSMODE9
GPSMODE7
GPSMODE10
GPSMODE1
(1)
(1)
nCS1
nCS0
NWE/NWR0
NOE/NRD
(1)
NUB/NWR1
EM_A0/NLB
EM_A21
OUT (RFU)
NWD_OVF
GPSMODE6
GPSMODE0
(1)
TXD2
RXD2
4574CS–GPS–05/05
DataSheet4 U .com
ATR0620 [Preliminary]
PIO Bank A
IO
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
MOSI
MOSI
MISO
MISO
SCK
SCK
NSS
NPCS0
EXTINT0
(1)
(1) (1)
(1) (1)
(1) nCS1
(1) nCS0
(1) NWE/NWR0
(1) NOE/NRD
(1) (1)
(1) NUB/NWR1
(1) EM_A0/NLB
EXTINT2
(1)
(1) AGCOUT0
SIGHI2
(1)
SIGLO2
(1)
(1) AGCOUT1
(1) (1)
(1) TXD2
RXD2
(1)
PIO Bank B
IO
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) GPS_MON2
(1) GPS_MON3
(1) MCLK_OUT
(1) GPS_MON4
(1) EM_A0/NLB
(1) (1)
(1) (1)
(1) AGCOUT0
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) MCLK_OUT
(1) EM_A21
(1) GPS_MON10
(1) NWD_OVF
(1) EM_A20
(1) GPS_MON7
(1) (1)
(1) EM_A22
(1) EM_A23
5
5 Page 
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ATR0620 [Preliminary]
7. USART2: Universal Synchronous/ Asynchronous Receiver/Transmitter
The ATR0620 provides three identical, full-duplex, universal synchronous/asynchronous
receiver/transmitters that interface to the APB and are connected to the peripheral data
controller.
The main features are:
• Programmable baud rate generator
• Parity, framing and overrun error detection
• Line break generation and the detection
• Automatic echo, local loopback and remote loopback channel modes
• Multi-drop mode: address detection and generation
• Interrupt generation
• Two dedicated peripheral data controller channels
• 5-, 6-, 7-, 8-, and 9-bit character length
• Protocol ISO 7816 T = 0 and T = 1
8. SPI: Serial Peripheral Interface
The ATR0620 features an SPI, which provides communication with external devices in master or
slave mode. The SPI has four external chip selects that can be connected to up to 15 devices.
The data length is programmable from 8- to 16-bit. The PDC is used to move data directly
between memory and SPI without CPU intervention for maximum real-time processing
throughput.
9. WD: Watchdog Timer
The ATR0620 features an internal watchdog timer, which can be used to guard against system
lock-up if the software becomes trapped in a deadlock. The watchdog timer can be programmed
to generate an interrupt or an internal reset.
10. PMC: Power Manager Controller
The power management controller allows optimization of power consumption. The PMC
enables/disables the clock inputs to most of the peripherals as well as to the ARM processor.
When the ARM clock is disabled, the current instruction is processed before the clock is
stopped. The clock can be re-enabled by any enabled interrupt or by a hardware reset. When a
peripheral clock is disabled, the clock is immediately stopped. When the clock is re-enabled the
peripheral resumes action where it left off.
Due to the static nature of the design, the contents of the on-chip RAM and registers for which
the clocks are disabled remain unchanged.
11. CLM: Clock Manager
In addition to the Power Management Controller (PMC) the Clock Manager (CLM) is another
possibility to reduce power consumption. The clock manager provides fixed divided clocks for
the USARTs, SPI and watchdog timer and generates the master clock which can be divided.
The master clock is programmable for frequencies between 175 kHz and 23.1 MHz.
4574CS–GPS–05/05
DataSheet4 U .com
11
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet ATR0620.PDF ] | |
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