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PDF AT91SAM7SE32 Data sheet ( Hoja de datos )
| Número de pieza | AT91SAM7SE32 | |
| Descripción | (AT91SAM7SExxx) Flash microcontroller | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Incorporates the ARM7TDMI® ARM® Thumb® Processor
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– EmbeddedICE™ In-circuit Emulation, Debug Communication Channel Support
• Internal High-speed Flash
– 512 Kbytes, Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes Dual
Plane (AT91SAM7SE512)
– 256 Kbytes (AT91SAM7SE256) Organized in One Bank of 1024 Pages of 256 Bytes
Single Plane (AT91SAM7SE256)
– 32 Kbytes (AT91SAM7SE32) Organized in One Bank of 256 Pages of 128 Bytes
Single Plane (AT91SAM7SE32)
– Single Cycle Access at Up to 30 MHz in Worst Case Conditions
– Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
– Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms
– 10,000 Erase Cycles, 10-year Data Retention Capability, Sector Lock Capabilities,
Flash Security Bit
– Fast Flash Programming Interface for High Volume Production
• 32 Kbytes (AT91SAM7SE512/256) or 8 Kbytes (AT91SAM7SE32) of Internal
High-speed SRAM, Single-cycle Access at Maximum Speed
• One External Bus Interface (EBI)
– Supports SDRAM, Static Memory, Glueless Connection to CompactFlash® and
ECC-enabled NAND Flash
• Memory Controller (MC)
– Embedded Flash Controller
– Memory Protection Unit
– Abort Status and Misalignment Detection
• Reset Controller (RSTC)
– Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout
Detector
– Provides External Reset Signal Shaping and Reset Source Status
• Clock Generator (CKGR)
– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL
• Power Management Controller (PMC)
– Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and
Idle Mode
– Three Programmable External Clock Signals
• Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt
Protected
• Debug Unit (DBGU)
– Two-wire UART and Support for Debug Communication Channel interrupt,
Programmable ICE Access Prevention
• Periodic Interval Timer (PIT)
– 20-bit Programmable Counter plus 12-bit Interval Counter
• Windowed Watchdog (WDT)
– 12-bit key-protected Programmable Counter
– Provides Reset or Interrupt Signals to the System
Product
Description
AT91SAM7SE512
AT91SAM7SE256
AT91SAM7SE32
Advance
Information
Summary
NOTE: This is a summary document.
The complete document is available on
the Atmel website at www.atmel.com.
6222AS–ATARM–23-Oct-06
DataSheet4 U .com
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AT91SAM7SE512/256/32 [Advance Information Summary]
3. Signal Description
Table 3-1. Signal Description List
Signal Name
VDDIN
VDDOUT
VDDFLASH
VDDIO
VDDCORE
VDDPLL
GND
XIN
XOUT
PLLRC
PCK0 - PCK2
TCK
TDI
TDO
TMS
JTAGSEL
ERASE
NRST
TST
DRXD
DTXD
IRQ0 - IRQ1
FIQ
Function
Type
Power
Voltage Regulator and ADC Power
Supply Input
Power
Voltage Regulator Output
Power
Flash and USB Power Supply
Power
I/O Lines Power Supply
Power
Core Power Supply
Power
PLL Power
Ground
Ground
Clocks, Oscillators and PLLs
Main Oscillator Input
Input
Main Oscillator Output
Output
PLL Filter
Input
Programmable Clock Output
Output
ICE and JTAG
Test Clock
Input
Test Data In
Input
Test Data Out
Output
Test Mode Select
Input
JTAG Selection
Input
Flash Memory
Flash and NVM Configuration Bits Erase
Command
Input
Reset/Test
Microcontroller Reset
I/O
Test Mode Select
Input
Debug Unit
Debug Receive Data
Input
Debug Transmit Data
Output
AIC
External Interrupt Inputs
Input
Fast Interrupt Input
Input
Active
Level
High
Low
High
Comments
3V to 3.6V
1.85V
3V to 3.6V
3V to 3.6V or 1.65V to 1.95V
1.65V to 1.95V
1.65V to 1.95V
No pull-up resistor
No pull-up resistor.
No pull-up resistor.
Pull-down resistor.
Pull-down resistor
Pull-Up resistor
Pull-down resistor
6222AS–ATARM–23-Oct-06
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AT91SAM7SE512/256/32 [Advance Information Summary]
4.3 144-ball LFBGA Package Outline
Figure 4-2 shows the orientation of the 144-ball LFBGA package and a detailed mechanical
description is given in the Mechanical Characteristics section.
Figure 4-2. 144-ball LFBGA Package Outline (Top View)
12
11
10
9
8
7
6
5
4
3
2
1
Ball A1
ABCDEFGHJKLM
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| Páginas | Total 47 Páginas | |
| PDF Descargar | [ Datasheet AT91SAM7SE32.PDF ] | |
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