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OX16PCI958 fiches techniques PDF

Oxford Semiconductor - Octal UART

Numéro de référence OX16PCI958
Description Octal UART
Fabricant Oxford Semiconductor 
Logo Oxford Semiconductor 





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OX16PCI958 fiche technique
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FEATURES
OX16PCI958 DATA SHEET
Octal UART
with PCI Interface
Efficient 32-bit, 331/3 MHz multi-function, target-only
PCI controller, compliant to PCI Local Bus
Specification 3.0 & PCI Power Management
Specification 1.1
Eight UARTs fully software compatible with 16C550-
type devices
Compatible with existing 16C550/450 device drivers
PCI 2.1, 2.2, 2.3 & 3.0 compliant
Supports both 5.0-V & 3.3-V PCI signalling
32-byte deep FIFO per transmitter & receiver
Baud rates up to 4.125 Mega-baud (using a
16.5 MHz input clock).
Clock can be provided from crystal oscillator or
external clock source
Automated out-of-band flow control using
CTS#/RTS#
Configuration data is held in a small, low-cost serial
MicrowireTM compatible EEPROM
Driver-facilitated DSR/DTR & Xon/Xoff handshaking
5-,6-,7- & 8-bit data framing
1, 1.5 or 2 stop bits
UART enhancements:
Clock prescaler allows more baud rate options
Readable FIFO levels & tuneable trigger levels
improve device driver performance
Programmable “synchronization factor” allows
baud rates up to fclock/4
Extensions to standard register set are
implemented in a safe, easy-to-use way
Low-power design with separate power management
control
Operating temp. range : 0oC—70oC
160-pin QFP package
Operation via IO or memory mapping
Support for multiple wake-up events
DESCRIPTION
The OX16PCI958 contains eight UARTs (Universal
Asynchronous Receiver-Transmitters) and a host
interface suitable for direct connection to a PCI bus.
Once installed and configured by the host OS, it provides
an eight-byte programming interface to each UART. The
UARTs are fully software-compatible with 16C550
devices. The device can be configured to fit the
requirements of RS232 or RS422 applications.
The UARTs convert between RS232-format serial data
on separate transmit and receive lines, and byte-wide I/O
writes and reads on the host interface. Malformed
incoming serial data is flagged along with the data in the
receive FIFO. The state of the UART can be found at
any time by reading status registers, and modem control
(handshaking output) lines can be individually controlled.
Although polled-mode operation is possible, the UART
will usually be operated on a host-interrupt basis. The
interrupt system is designed to allow efficient handling of
interrupt service requests from the UART, for example by
using the prioritised interrupt identification register,
readable FIFO levels, and tuneable FIFO trigger levels.
The internal transmitter and receiver logic runs at a
programmable synchronisation factor of 4x, 8x, or 16x
the serial baud rate. This internal clock is generated by
dividing a reference clock by an integer divisor from 1 to
(216–1). In this way the UART can accommodate a serial
rate of up to 4 125 000 baud (using a 16.5 MHz input
clock).
The OX16PCI958 provides a host interface that can be
directly connected to a PCI bus. It responds to
configuration accesses, and once configured it also
responds to I/O and memory accesses for control of the
UART. The data for configuration space is read from a
small external serial EEPROM at start-up, together with
information on how the OX16PCI958 should be set up.
Oxford Semiconductor Ltd.
External—Free Release
25 Milton Park, Abingdon, Oxon, OX14 4SH, UK
Tel: +44 (0)1235 824900
Oxford Semiconductor 2005
OX16PCI958 DS-0022—Nov 2005
Part No. OX16PCI958—PQAG

PagesPages 30
Télécharger [ OX16PCI958 ]


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