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PDF ADE7760 Data sheet ( Hoja de datos )
| Número de pieza | ADE7760 | |
| Descripción | Energy Metering IC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
High accuracy active energy measurement IC, supports
IEC 687/61036
Less than 0.1% error over a dynamic range of 500 to 1
Supplies active power on the frequency outputs F1 and F2
High frequency output CF is intended for calibration and
supplies instantaneous active power
Continuous monitoring of the phase and neutral current
allows fault detection in 2-wire distribution systems
Current channels input level best suited for current
transformer sensors
Uses the larger of the two currents (phase or neutral) to
bill—even during a fault condition
Two logic outputs (FAULT and REVP) can be used to indicate
a potential miswiring or fault condition
Direct drive for electromechanical counters and 2-phase
stepper motors (F1 and F2)
Proprietary ADCs and DSP provide high accuracy over large
variations in environmental conditions and time
Reference 2.5 V ± 8% (drift 30 ppm/°C typical) with external
overdrive capability
Single 5 V supply, low power
Energy Metering IC with
On-Chip Fault Detection
ADE7760
GENERAL DESCRIPTION
The ADE7760 is a high accuracy, fault tolerant, electrical energy
measurement IC intended for use with 2-wire distribution
systems. The part specifications surpass the accuracy require-
ments as quoted in the IEC61036 standard.
The only analog circuitry used on the ADE7760 is in the ADCs
and reference circuit. All other signal processing (such as multi-
plication and filtering) is carried out in the digital domain. This
approach provides superior stability and accuracy over extremes
in environmental conditions and over time.
The ADE7760 incorporates a fault detection scheme similar to
the ADE7751 by continuously monitoring both the phase and
neutral currents. A fault is indicated when these currents differ
by more than 6.25%.
The ADE7760 supplies average active power information on the
low frequency outputs F1 and F2. The CF logic output gives
instantaneous active power information.
The ADE7760 includes a power supply monitoring circuit on
the VDD supply pin. Internal phase-matching circuitry ensures
that the voltage and current channels are matched. An internal
no-load threshold ensures that the ADE7760 does not exhibit
any creep when there is no load.
V1A 2
V1N 4
V1B 3
V2P 6
V2N 5
AGND
8
FUNCTIONAL BLOCK DIAGRAM
FAULT
15
VDD
1
POWER
SUPPLY MONITOR
ADE7760
SIGNAL PROCESSING BLOCK
ADC
A>B
HPF
ADC
B>A
A<>B
ADC
LPF
2.5V
4kΩ
REFERENCE
INTERNAL
OSCILLATOR
DIGITAL-TO-FREQUENCY CONVERTER
9
REFIN/OUT
14
RCLKIN
17
DGND
10 11 12 16 18 19 20
SCF S1 S0 REVP CF F2 F1
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
1 page  
TIMING CHARACTERISTICS
VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, on-chip oscillator, TMIN to TMAX = –40°C to +85°C.
Sample tested during initial release and after any redesign or process change that may affect this parameter.
See Figure 2.
Table 2.
Parameter
t11
t2
t3
t41
t5
t6
Value
120
See Table 6
1/2 t2
90
See Table 7
CLKIN/4
Unit Test Conditions/Comments
ms F1 and F2 Pulse Width (Logic High).
s Output Pulse Period. See the Transfer Function section.
s Time between F1 Falling Edge and F2 Falling Edge.
ms CF Pulse Width (Logic High).
s CF Pulse Period. See the Transfer Function section.
s Minimum Time between F1 and F2 Pulse.
1 The pulse widths of F1, F2, and CF are not fixed for higher output frequencies. See the Transfer Function section.
t1
F1
F2
t4
CF
t6
t2
t3
t5
Figure 2. Timing Diagram for Frequency Outputs
ADE7760
Rev. 0 | Page 5 of 24
5 Page 
OPERATION
POWER SUPPLY MONITOR
The ADE7760 contains an on-chip power supply monitor. The
power supply (VDD) is continuously monitored by the ADE7760.
If the supply is less than 4 V ± 5%, the ADE7760 goes into an
inactive state, that is, no energy is accumulated and the CF, F1,
and F2 outputs is disabled. This is useful to ensure correct
device operation at power-up and during power-down. The
power supply monitor has built-in hysteresis and filtering. This
gives a high degree of immunity to false triggering due to noisy
supplies.
The power supply and decoupling for the part should be such
that the ripple at VDD does not exceed 5 V ± 5% as specified for
normal operation.
VDD
5V
4V
0V
ADE7760
REVP - FAULT - CF - INACTIVE
F1 - F2 OUTPUTS
TIME
ACTIVE
INACTIVE
Figure 8. On-Chip Power Supply Monitoring
ANALOG INPUTS
Channel V1 (Current Channel)
The voltage outputs from the current transducers are connected
to the ADE7760 here. Channel V1 has two voltage inputs, V1A
and V1B. These inputs are fully differential with respect to V1N.
However, at any one time, only one is selected to perform the
power calculation (see the Fault Detection section).
The maximum peak differential signal on V1A–V1N and V1B–V1N
is ±660 mV. Figure 9 shows the maximum signal levels on V1A,
V1B, and V1N. The differential voltage signal on the inputs must
be referenced to a common mode such as AGND.
V1A, V1B
+660mV + VCM
VCM
–660mV + VCM
DIFFERENTIAL INPUT A
±660mV MAX PEAK
COMMON MODE
±100mV MAX
VCM
AGND
DIFFERENTIAL INPUT B
±660mV MAX PEAK
V1A
V1
V1N
V1
V1B
Figure 9. Maximum Signal Levels, Channel 1
ADE7760
Channel V2 (Voltage Channel)
The output of the line voltage transducer is connected to the
ADE7760 at this analog input. Channel V2 is a single-ended
voltage input. The maximum peak differential signal on
Channel 2 is ±660 mV with respect to V2N. Figure 10 shows the
maximum signal levels that can be connected to Channel 2.
V2
+660mV + VCM
VCM
–660mV + VCM
DIFFERENTIAL INPUT
±660mV MAX PEAK
COMMON MODE
±100mV MAX
V2P
V2
V2N
VCM
Figure 10. Maximum Signal Levels, Channel 2
The differential voltage V2P–V2N must be referenced to a
common mode (usually AGND). The analog inputs of the
ADE7760 can be driven with common-mode voltages of up to
100 mV with respect to AGND. However, the best results are
achieved using a common mode equal to AGND.
Typical Connection Diagrams
Figure 11 shows a typical connection diagram for Channel V1.
The analog inputs are being used to monitor both the phase and
neutral currents. Because of the large potential difference
between the phase and neutral, two current transformers (CTs)
must be used to provide the isolation. Note that both CTs are
referenced to AGND (analog ground); the common-mode
voltage is, therefore, 0 V. The CT turns ratio and burden resistor
(RB) are selected to give a peak differential voltage of ±660 mV.
RF V1A
CT
IP IN AGND
RB
RB
CF
V1N
CF
CT
RF V1B
Figure 11. Typical Connection for Channel 1
Figure 12 shows two typical connections for Channel V2. The
first option uses a potential transformer (PT) to provide
complete isolation from the main voltage. In the second option,
the ADE7760 is biased around the neutral wire, and a resistor
divider is used to provide a voltage signal that is proportional to
the line voltage. Adjusting the ratio of RA and RB + VR is a
convenient way of carrying out a gain calibration on the meter.
Rev. 0 | Page 11 of 24
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| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet ADE7760.PDF ] | |
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