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PDF ADE7762 Data sheet ( Hoja de datos )

Número de pieza ADE7762
Descripción Polyphase Energy Metering IC
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Polyphase Energy Metering IC with Phase
Drop Indication
Preliminary Technical Data
ADE7762
FEATURES
High accuracy supports 50 Hz/60 Hz IEC62053-21
Less than 0.1% error over a dynamic range of 500 to 1
Compatible with 3-phase 3-wire delta and 3-phase 4-wire Wye
configurations
Supplies average active power on the frequency outputs F1 and F2
High frequency output (CF) is intended for calibration and
supplies instantaneous active power
Logic output REVP indicates a potential miswiring or negative
power on the sum of all phases
Dropout indication for each phase on LED driver pins
Phase sequence error detection
Direct drive for electromechanical counters and 2-phase stepper
motors (F1 and F2)
Proprietary ADCs and DSP provide high accuracy over large
variations in environmental conditions and time
On-chip power supply monitoring
On-chip creep protection (no load threshold)
On-chip reference 2.4 V ± 8% (25 ppm/°C typical) with external
overdrive capability
Single 5 V supply, low power (TBD mW typical)
Low cost CMOS process
GENERAL DESCRIPTION
The ADE77621 is a high accuracy polyphase electrical energy
measurement IC. The ADE7762 specifications surpass the
accuracy requirements as quoted in the IEC62053-21 standard.
The only analog circuitry used in the ADE7762 is in the
analog-to-digital converters (ADCs) and reference circuit. All
other signal processing (for example, multiplication, filtering,
and summation) is carried out in the digital domain. This
approach provides superior stability and accuracy over
extremes in environmental conditions and over time.
The ADE7762 supplies average active power information on the
low frequency outputs, F1 and F2. These logic outputs can be
used to directly drive an electromechanical counter or to inter-
face with an MCU. The CF logic output gives instantaneous
active power information. This output is intended to be used for
calibration purposes.
The ADE7762 includes a power supply monitoring circuit on the
VDD pin. The ADE7762 remains inactive until the supply voltage
on VDD reaches 4 V. If the supply falls below 4 V, the ADE7762
also resets and no pulses are issued on F1, F2, and CF.
A multiple multiplexed logic output provides phase dropout per
phase, reverse polarity per phase, and a phase sequence error.
Internal phase matching circuitry ensures that the voltage and
current channels are phase matched. An internal no load
threshold ensures the ADE7762 does not exhibit any creep
when there is no load.
The ADE7762 is available in a 28-lead SOIC package.
1 Patent pending.
FUNCTIONAL BLOCK DIAGRAM
ABS
19
VDD
5
IAP 7
IAN 8
VAP 18
ADC
ADC
HPF
Φ
X
LPF
POWER
SUPPLY
MONITOR
IBP 9
IBN 10
VBP 17
ADC
ADC
ICP 11
ICN 12
VCP 16
VN 15
ADC
ADC
4kΩ
2.4V REF
HPF
Φ
HPF
Φ
PHASE AND REVP MONITOR
ADE7762
XΣ
LPF
4 DGND
21 CLKIN
22 CLKOUT
X
LPF
DIGITAL-TO-FREQUENCY CONVERTER
13
AGND
14 1 2 28 27 6 20 23 24 25 26 3
REFIN/OUT LED_CTRL LED_A LED_B LED_C REVP SCF S0 S1 F2 F1 CF
Figure 1.
Rev. PrB
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
© 2006 Analog Devices, Inc. All rights reserved.

1 page




ADE7762 pdf
Preliminary Technical Data
ADE7762
TIMING CHARACTERISTICS
VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, CLKIN = 10 MHz, TMIN to TMAX = −40°C to +85°C, unless otherwise noted.
Table 2.
Parameter 1 , 2
t1 3
t2
Conditions
F1 and F2 pulse width (logic high)
Output pulse period (see the Transfer Function section)
Specification
120
See Figure 2
Unit
ms
sec
t3 Time between F1 falling edge and F2 falling edge
1/2 t2
sec
t43, 4 CF pulse width (logic high)
90 ms
t55 CF pulse period (see the Transfer Function section)
See Table 7 sec
t6 Minimum time between F1 and F2 pulse
4/CLKIN
sec
t7 LED_CTRL pulse width
28.8 μs
t8 LED_CTRL period
57.5 μs
t9 LED pulse width
7.2 μs
1 Sample tested during initial release and after any redesign or process changes that might affect this parameter.
2 See Figure 2.
3 The pulse widths of F1, F2, and CF are not fixed for higher output frequencies (see the Frequency Outputs section).
4 CF is not synchronous to F1 or F2 frequency outputs.
5 The CF pulse is always 1 μs in the high frequency mode (see the Frequency Outputs section).
t1
F1
t6
t2
F2 t3
t4
CF
t5
Figure 2. Timing Diagram for Frequency Outputs
t8
t7
t9
Figure 3: Timing Diagram for LED Drivers
Rev. PrB | Page 5 of 28

5 Page





ADE7762 arduino
Preliminary Technical Data
TERMINOLOGY
Measurement Error
The error associated with the energy measurement made by the
ADE7762 is defined by the following formula:
Percentage
Error
=
Energy
Registered by ADE7762
True Energy
True
Energy
×
100%
Error between Channels
The high-pass filter (HPF) in the current channel has a phase
lead response. To offset this phase response and equalize the
phase response between channels, a phase correction network is
placed in the current channel. The phase correction network
ensures a phase match between the current channels and
voltage channels to within ±0.1° over a range of 45 Hz to 65 Hz
and ±0.2° over a range of 40 Hz to 1 kHz (see Figure 28 and
Figure 29).
Power Supply Rejection (PSR)
This quantifies the ADE7762 measurement error as a
percentage of reading when the power supplies are varied.
For the ac PSR measurement, a reading at a nominal supply
(5 V) is taken. A 200 mV rms/100 Hz signal is then introduced
onto the supply and a second reading is obtained under the
same input signal levels. Any error introduced is expressed as a
percentage of reading. See definition for Measurement Error.
For the dc PSR measurement, a reading at nominal supplies
(5 V) is taken. The supply is then varied ±5% and a second
reading is obtained with the same input signal levels. Any error
introduced is again expressed as a percentage of reading.
ADE7762
ADC Offset Error
This refers to the dc offset associated with the analog inputs to
the ADCs. It means that with the analog inputs connected to
AGND, the ADCs still see an analog input signal offset.
However, because the HPF is always present, the offset is
removed from the current channel and the power calculation is
not affected by this offset.
Gain Error
The gain error of the ADE7762 is defined as the difference
between the measured output frequency (minus the offset) and
the ideal output frequency. The difference is expressed as a
percentage of the ideal frequency. The ideal frequency is
obtained from the ADE7762 transfer function (see the Transfer
Function section).
Rev. PrB | Page 11 of 28

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