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PDF ADE7769 Data sheet ( Hoja de datos )

Número de pieza ADE7769
Descripción Energy Metering IC
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Energy Metering IC with Integrated
Oscillator and No-Load Indication
ADE7769
FEATURES
On-chip oscillator as clock source
High accuracy, supports 50 Hz/60 Hz IEC62053-21
Less than 0.1% error over a dynamic range of 500 to 1
Supplies average real power on frequency outputs F1 and F2
High frequency output CF calibrates and supplies
instantaneous real power
CF output remains logic high when ADE7769 is under
no-load threshold
Logic output REVP indicates a potential miswiring or
negative power
Direct drive for electromechanical counters and 2-phase
stepper motors (F1 and F2)
Proprietary ADCs and DSPs provide high accuracy over
large variations in environmental conditions and time
On-chip power supply monitoring
On-chip creep protection (no-load threshold)
On-chip reference 2.45 V (20 ppm/°C typical) with external
overdrive capability
Single 5 V supply, low power (20 mW typical)
Low cost CMOS process
GENERAL DESCRIPTION
The ADE77691 is a high accuracy electrical energy metering IC.
It is a pin reduction version of the ADE7755 with an enhanced,
precise oscillator circuit that serves as a clock source to the chip.
The ADE7769 eliminates the cost of an external crystal or
resonator, thus reducing the overall cost of a meter built with
this IC. The chip directly interfaces with the shunt resistor.
The ADE7769 specifications surpass the accuracy require-
ments of the IEC62053-21 standard. The AN-679 Application
Note can be used as a basis for a description of an IEC61036
(equivalent to IEC62053-21) low cost, watt-hour meter
reference design.
The only analog circuitry used in the ADE7769 is in the Σ-Δ
ADCs and reference circuit. All other signal processing, such as
multiplication and filtering, is carried out in the digital domain.
This approach provides superior stability and accuracy over
time and extreme environmental conditions.
The ADE7769 supplies average real power information on the
low frequency outputs, F1 and F2. These outputs can be used to
directly drive an electromechanical counter or interface with an
MCU. The high frequency CF logic output, ideal for calibration
purposes, provides instantaneous real power information.
The ADE7769 includes a power supply monitoring circuit on
the VDD supply pin. The ADE7769 remains inactive until the
supply voltage on VDD reaches approximately 4 V. If the supply
falls below 4 V, the ADE7769 also remains inactive and the F1,
F2, and CF outputs are in their nonactive modes.
Internal phase matching circuitry ensures that the voltage and
current channels are phase matched, while the HPF in the
current channel eliminates dc offsets. An internal no-load
threshold ensures that the ADE7769 does not exhibit creep
when no load is present. During a no-load condition, the CF
pin stays logic high.
1U.S. Patents 5,745,323; 5,760,617; 5,862,069; 5,872,469; others pending.
The ADE7769 has a 16-lead, narrow body SOIC package.
V2P 2
V2N 3
V1N 4
V1P 5
FUNCTIONAL BLOCK DIAGRAM
VDD
1
AGND
6
POWER
SUPPLY MONITOR
+ Σ-Δ ...110101...
ADC
ADE7769
DGND
13
MULTIPLIER
SIGNAL
PROCESSING
BLOCK
Σ-Δ
+ ADC
2.5V
4kΩ
REFERENCE
...11011001...
PHASE
CORRECTION
Φ
HPF
LPF
INTERNAL
OSCILLATOR
DIGITAL-TO-FREQUENCY
CONVERTER
7
REFIN/OUT
11
RCLKIN
8 10
SCF S0
Figure 1.
9 12 14
S1 REVP CF
16
F1
15
F2
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.

1 page




ADE7769 pdf
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
VDD to AGND
VDD to DGND
Analog Input Voltage to AGND,
V1P, V1N, V2P, and V2N
Reference Input Voltage to AGND
Digital Input Voltage to DGND
Digital Output Voltage to DGND
Operating Temperature Range
Storage Temperature Range
Junction Temperature
16-Lead Plastic SOIC, Power Dissipation
θJA Thermal Impedance1
Package Temperature Soldering
1 JEDEC 1S standard (2-layer) board data.
Value
−0.3 V to +7 V
–0.3 V to +7 V
–6 V to +6 V
–0.3 V to VDD + 0.3 V
–0.3 V to VDD + 0.3 V
–0.3 V to VDD + 0.3 V
–40°C to +85°C
–65°C to +150°C
150°C
350 mW
124.9°C/W
See J-STD-20
ADE7769
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degrada-
tion or loss of functionality.
Rev. A | Page 5 of 20

5 Page





ADE7769 arduino
( )
i(t) = IO + 2 × Ih × sin hωt + βh
ho
(3)
where:
i(t) is the instantaneous current.
I0 is the dc component.
Ih is the rms value of current harmonic h.
βh is the phase angle of the current harmonic.
Using Equations 2 and 3, the real power (P) can be expressed in
terms of its fundamental real power (P1) and harmonic real
power (PH) as P = P1 + PH
where:
P1 = V1 × I1 cos φ 1
(4)
φ1 = α1 β1
and
PH = Vh × Ih cos φh
h1
(5)
φh = αh βh
In Equation 5, a harmonic real power component is generated
for every harmonic, provided that harmonic is present in both
the voltage and current waveforms. The power factor calcu-
lation has previously been shown to be accurate in the case of a
pure sinusoid. Therefore, the harmonic real power must also
correctly account for the power factor because it is made up of
a series of pure sinusoids.
Note that the input bandwidth of the analog inputs is 7 kHz at
the nominal internal oscillator frequency of 450 kHz.
ANALOG INPUTS
Channel V1 (Current Channel)
The voltage output from the current sensor is connected to the
ADE7769 here. Channel V1 is a fully differential voltage input.
V1P is the positive input with respect to V1N.
The maximum peak differential signal on Channel V1 should
be less than ±30 mV (21 mV rms for a pure sinusoidal signal)
for specified operation.
V1
+30mV
VCM
DIFFERENTIAL INPUT
±30mV MAX PEAK
COMMON-MODE
±6.25mV MAX
V1P
V1 V1N
VCM
–30mV
AGND
Figure 17. Maximum Signal Levels, Channel V1
ADE7769
Figure 17 shows the maximum signal levels on V1P and V1N.
The maximum differential voltage is ±30 mV. The differential
voltage signal on the inputs must be referenced to a common
mode, for example, AGND. The maximum common-mode
signal is ±6.25 mV, as shown in Figure 17.
Channel V2 (Voltage Channel)
The output of the line voltage sensor is connected to the
ADE7769 at this analog input. Channel V2 is a fully differential
voltage input with a maximum peak differential signal of
±165 mV. Figure 18 shows the maximum signal levels that can
be connected to the ADE7769 Channel V2.
V2
+165mV
VCM
DIFFERENTIAL INPUT
±165mV MAX PEAK
COMMON-MODE
±25mV MAX
V2P
V2 V2N
VCM
–165mV
AGND
Figure 18. Maximum Signal Levels, Channel V2
Channel V2 is usually driven from a common-mode voltage,
that is, the differential voltage signal on the input is referenced
to a common mode (usually AGND). The analog inputs of the
ADE7769 can be driven with common-mode voltages of up to
25 mV with respect to AGND. However, best results are
achieved using a common mode equal to AGND.
Typical Connection Diagrams
Figure 19 shows a typical connection diagram for Channel V1.
A shunt is the current sensor selected for this example because
of its low cost compared to other current sensors, such as the
current transformer (CT). This IC is ideal for low current meters.
SHUNT
RF
±30mV
V1P
CF
V1N
RF CF
AGND
PHASE NEUTRAL
Figure 19. Typical Connection for Channel V1
Figure 20 shows a typical connection for Channel V2. Typically,
the ADE7769 is biased around the phase wire, and a resistor
divider is used to provide a voltage signal that is proportional to
the line voltage. Adjusting the ratio of RA, RB,B and RF is also a
convenient way of carrying out a gain calibration on a meter.
Rev. A | Page 11 of 20

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