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PDF AN105 Data sheet ( Hoja de datos )
| Número de pieza | AN105 | |
| Descripción | FETS AS VOLTAGE-CONTROLLED RESISTORS | |
| Fabricantes | Vishay Siliconix | |
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FETs As VoltageĆControlled Resistors
AN105
Introduction: The Nature of VCRs
A voltage-controlled resistor (VCR) may be defined as a
three-terminal variable resistor where the resistance val-
ue between two of the terminals is controlled by a voltage
potential applied to the third.
For a junction field-effect transistor (JFET) under certain
operating conditions, the resistance of the drain-source
channel is a function of the gate-source voltage alone and
the JFET will behave as an almost pure ohmic resistor.
Maximum drain-source current, IDSS, and minimum re-
sistance rDS(on), will exist when the gate-source voltage
is equal to zero volts (VGS = 0). If the gate voltage is in-
creased (negatively for n-channel JFETs and positively
for p-channel), the resistance will also increase. When the
drain current is reduced to a point where the FET is no
longer conductive, the maximum resistance is reached.
The voltage at this point is referred to as the pinchoff or
cutoff voltage and is symbolized by VGS = VGS(off). Thus
the device functions as a voltage- controlled resistor.
VDS = VGS - VGS(off)
Region 1
Ohmic Region
Locus Curve
Region 2
IDSS VGS = 0
Current Saturation Region
VGS t 0
VGS → VGS(off)
VP
VDS - DrainĆSource Voltage (V)
Figure 1. Typical NĆChannel JFET
Operating Characteristics
Figure 1 details typical operating characteristics of an n-
channel JFET. Most amplification or switching operations
of FETs occur in the constant-current (saturated) region,
shown as Region II. A close inspection of Region I (the un-
saturated or pre-pinchoff area) reveals that the effective
slope indicative of conductance across the channel from
drain-to-source is different for each value of gate-source
bias voltage. The slope is relatively constant over a range of
applied drain voltages, so long as the gate voltage is also
constant and the drain voltage is low.
Resistance Properties of FETs
The unique resistance-controlling properties of FETs can
be deduced from Figure 2, which is an expanded-scale
plot of the encircled area in the lower left-hand corner of
Figure 1. The output characteristics all pass through the
origin, near which they become almost straight lines so
that the incremental value of channel resistance, rDS, is
essentially the same as that of dc resistance, rDS, and is a
function of VGS.
Figure 2 shows an extension of the operating characteris-
tics into the third quadrant for a typical n-channel JFET.
While such devices are normally operated with a positive
drain-source voltage, small negative values of VDS are
possible. This is because the gate-channel PN junction
must be slightly forward-biased before any significant
amount of gate current flows. The slope of the VGS bias
line is equal to ID/VDS = 1/rDS. This value is controlled
by the amount of voltage applied to the gate. Minimum
rDS, usually expressed as rDS(on), occurs at VGS = 0 and
is dictated by the geometry of the FET. A device with a
channel of small cross-sectional area will exhibit a high
rDS(on) and a low IDSS. Thus a FET with high IDSS should
be chosen where design requirements indicate the need
for a low rDS(on).
Updates to this app note may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70598.
Siliconix
10-Mar-97
1
1 page  
AN105
Distortion resulting from changes in temperature is also
minimized by the feedback resistor technique. On-resis-
tance will change with temperature in an inverse manner
to the behavior of FET drain current. Table 1 presents the
result of VCR laboratory performance tests of distortion
versus temperature. The VCR7N again was employed.
Signal level was 2 V peak-to-peak.
Summary
This application note has presented a brief description of the
use of junction field-effect transistors as voltage-controlled
resistors, including details of operation, characteristics, li-
mitations, and applications. The VCR is capable of opera-
tion as a symmetrical resistor with no dc bias voltage in the
signal loop, an ideal characteristic for many applications.
Where large signal-handling capability and minimum
distortion are system requirements, the feedback neutral-
ization technique for VCRs is an important tool in achiev-
ing either or both ends.
It has also been shown that FETs with high pinch-off volt-
age require larger drain-to-source voltages to produce
drain current saturation. Therefore, FETs with high
VGS(off) will have a larger dynamic range in terms of ap-
plied signal amplitude, while maintaining a linear resis-
tance. It is advantageous to select FETs with high VGS(off)
compatible with the desired rDS value if large signal lev-
els are to be encountered.
A number of other FET VCR applications are shown in
Figures 10 through 15.
R1
VIN
VCR
VGS
2
OPA
6
3
R2
VOUT
Video
Input
–V
VCR
VCR
VCR
Video
Output
Lowest frequency at JFET VGS(off) and tuned by R2.
Upper frequency is controlled by R1.
Figure 10. Voltage-Tuned Filter Octave Range
The “T” attenuator provides for optimum dynamic linear range
attenuation.
Figure 11. Voltage Controlled Variable Gain Amplifier
VIN
–
VGS
+
2
OPA
6
3
VOUT
Figure 12. Electronic Gain Control
VIN
–VGS
+
VCR
VOUT
Figure 13. VCR Phase Advance Circuit
Siliconix
10-Mar-97
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet AN105.PDF ] | |
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