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PDF JN5121 Data sheet ( Hoja de datos )

Número de pieza JN5121
Descripción IEEE802.15.4 Wireless Microcontroller
Fabricantes Jennic 
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Data Sheet – JN5121
IEEE802.15.4 Wireless Microcontroller
Overview
The JN5121 is the first in a series of low power, low cost IEEE802.15.4 compliant
wireless microcontrollers. Combining an on chip 32-bit RISC core, a fully compliant
2.4GHz IEEE802.15.4 transceiver, 64Kb of ROM and 96Kb of RAM, provides a
versatile low cost solution for wireless sensor networking applications. The high level
of integration helps to reduce the overall system cost. In particular, the ROM enables
integration of point-to-point and mesh network stack protocols, and the RAM allows
support of router and controller functions without the need for additional external
memory. The JN5121 uses hardware MAC and highly secure AES encryption
accelerators for low power and minimum processor overhead. Integrated sleep
oscillator and power saving facilities are provided, giving low system power
consumption. The device also incorporates a wide range of digital and analogue
peripherals for the user to connect to their application.
Block Diagram
2.4GHz
Radio
XTAL
Power
Management
O-QPSK
Modem
IEEE802.15.4
MAC
Accelerator
128-bit AES
Encryption
Accelerator
RAM
96kb
ROM
64kb
RISC CPU
SPI
2-wire serial
Timers
UARTs
12-bit ADC,
comparators
11-bit DACs,
temp sensor
Benefits
Single chip solution with integrated
transceiver and microcontroller for
wireless sensor networks
Capacity and power efficient
microcontroller for both controllers
and sensor units
Low application BOM cost and
size
Hardware MAC ensures low power
consumption and low processor
overhead
Extensive user peripherals
Applications
Robust and secure low power
wireless applications
Wireless sensor networks,
particularly IEEE802.15.4 /
ZigBee systems
Home and commercial building
automation
Home networks
Toys and gaming peripherals
Industrial systems
Telemetry and utilities
(e.g. AMR)
Features: Transceiver
2.4GHz IEEE802.15.4
compliant
Security processor (128-bit
AES)
MAC accelerator with packet
formatting, CRCs, address
check, auto-acks, timers
Integrated power management
and sleep oscillator for low
power
On-chip power regulation for
2.2V to 3.6V battery operation
Sleep current (with active
beacon timer) < 5µA
Minimum of external
components at < US$1 cost
Rx current < 50mA
Tx current < 40mA
Receiver sensitivity -93dBm
Transmit power +1dBm
Features: Microcontroller
16MHz 32-bit RISC optimised
for low power (3MIPS/mA) and
efficient code density
96k RAM for shared program,
data and routing tables
64k ROM for program code
4-input 12-bit ADC, 2 11-bit
DACs, 2 comparators,
temperature sensor
2 Application timer/counters,
3 system timers
2 UARTs (one for in-system
debug)
SPI port with 5 selects
2 wire serial interface
21 GPIO
Industrial temperature range
(-40°C to +85°C)
8x8mm 56 lead QFN package
Lead-free and RoHS compliant
i
JN-DS-JN5121 v1.2
© Jennic 2005

1 page




JN5121 pdf
www.DataSheet4U.com
16.2.2 Sleep
16.2.3 Deep Sleep
16.3 Wakeup Events
16.3.1 Wakeup Timer Event
16.3.2 DIO Event
16.3.3 Comparator Event
17 Electrical Characteristics
17.1 Maximum ratings
17.2 DC Electrical Characteristics
17.2.1 Operating Conditions
17.2.2 DC Current Consumption
17.2.3 I/O Characteristics
17.3 AC Characteristics
17.3.1 Reset
17.3.2 SPI Timing
17.3.3 Two-wire serial interface
17.3.4 Power Down and Wake-Up timings
17.3.5 32kHz Oscillator
17.3.6 16MHz Crystal Oscillator
17.3.7 Analogue to Digital Converters
17.3.8 Digital to Analogue Converters
17.3.9 Comparators
17.3.10 Temperature Sensor
17.3.11 Radio Transceiver
Appendix A Mechanical and Ordering information
A.1 Package Drawing
A.2 Ordering Information:
Appendix B Development Support
B.1 Crystal Requirements
B.2 Applications Schematic
Appendix C
Related Documents
Version Control
Disclaimers
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© Jennic 2005
JN-DS-JN5121 v1.2
iii

5 Page





JN5121 arduino
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2.1 Pin Assignment
Pin No
3, 13, 15, 21 28,
35, 40
16, 49
7, 9, 10, 39
Paddle
8
11, 12
14
19
20, 22
24, 25, 26, 27
23
29, 30
17, 18, 31, 32
33
36
34
37
38
41
42
43
Power supplies
VB_PROT, VB_SYN, VB_VCO, VB_RF, VB_A,
VB_APP, VB_MEM
VDD1, VDD2
VSS2, VSS3, VSSS, VSS1
VSSA
General
RESETN
XTALOUT, XTALIN
Radio
VCOTUNE
IBIAS
RFP, RFM
Analogue Peripheral I/O
ADC1, ADC2, ADC3, ADC4
VREF
DAC1, DAC2
COMP1M, COMP1P, COMP2P, COMP2M
Digital I/O
Primary Function
Alternate Function
SPICLK
SPIMOSI
SPIMISO
SPISEL0
DIO0
SPISEL1
DIO1
SPISEL2
DIO2
SPISEL3
DIO3
SPISEL4, RFTX
44 DIO4
45 DIO5
46 DIO6
47 DIO7
48 DIO8
50 DIO9
51 DIO10
52 DIO11
53 DIO12
54 DIO13
55 DIO14
CTS0
RTS0
TXD0
RXD0
TIM0CK_GT
TIM0CAP
TIM0OUT
TIM1CK_GT
TIM1CAP
TIM1OUT
SIF_CLK, IP_CLK
56 DIO15
SIF_D, IP_DO
1 DIO16
2 DIO17
IP_DI
CTS1, IP_SEL
4 DIO18
RTS1, IP_INT
5 DIO19
6 DIO20
TXD1
RXD1
Description
Regulated supply voltage
Device supplies: VDD1 for analog, VDD2 for digital
Device grounds
(see appendix A.1 for paddle details)
Reset input
System crystal oscillator
VCO tuning RC network
Bias current control
Differential antenna port
ADC inputs
Analogue peripheral reference voltage
DAC outputs
Comparator inputs
SPI Clock
SPI Master Out Slave In
SPI Master In Slave Out
SPI Slave Select Input/Output 0
DIO0 or SPI Slave Select Output 1
DIO1 or SPI Slave Select Output 2
DIO2 or SPI Slave Select Output 3
DIO3 or SPI Slave Select Output 4 or
Radio Transmit Control Output
DIO4 or UART 0 Clear To Send Input
DIO5 or UART 0 Request To Send Output
DIO6 or UART 0 Transmit Data Output
DIO7 or UART 0 Receive Data Input
DIO8 or Timer0 Clock/Gate Input
DIO9 or Timer0 Capture Input
DIO10 or Timer0 PWM Output
DIO11 or Timer1 Clock/Gate Input
DIO12 or Timer1 Capture Input
DIO13 or Timer1 PWM Output
DIO14 or Serial Interface Clock or Intelligent
Peripheral Clock Input
DIO15 or Serial Interface Data or Intelligent
Peripheral Data Out
DIO16 or Intelligent Peripheral Data In
DIO17 or UART 1 Clear To Send Input or Intelligent
Peripheral Device Select Input
DIO18 or UART 1 Request To Send Output or
Intelligent Peripheral Interrupt Output
DIO19 or UART 1 Transmit Data Output
DIO20 or UART 1 Receive Data Input
© Jennic 2005
JN-DS-JN5121 v1.2
5

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