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PDF ISL24006 Data sheet ( Hoja de datos )

Número de pieza ISL24006
Descripción 14-Channel Programmable Switchable I2C TFT-LCD Reference Voltage Generator
Fabricantes Intersil Corporation 
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Data Sheet
14-Channel Programmable Switchable I2C
TFT-LCD Reference Voltage Generator
with Integrated 4-Channel Static Gamma
Drivers
The ISL24006 is a 14-channel programmable switchable
reference voltage generator with four channels of static
gamma drivers integrated, for a complete 18-channel total
gamma solution for TFT-LCD displays. The 14-channel
programmable switchable configuration allows switching
between two gamma curves.
The ISL24006 is divided into two banks of seven generators:
one designed to cover the range from VREFL_L to VREFL_H;
the remaining seven channels covering the range from
VREFU_L to VREFU_H. Each bank has its own separate high
and low reference inputs, with integrated buffers (four static
gamma drivers) to drive the column driver internal DAC
resistor string to within 0.2V from the top and bottom rails.
An output MUX is used to switch between the two curves in
less than 1µs. Switching is controlled using an external
select pin.
ISL24006 includes an I2C interface for programming the
offset values.
ISL24006 is available in the 38-pin QFN package and is
specified for operation over the -40°C to +85°C temperature
range.
Ordering Information
PART
NUMBER
PACKAGE
TAPE &
REEL
PKG. DWG. #
ISL24006IR-T7
38-Pin QFN
7”
MDP0046
ISL24006IR-T13 38-Pin QFN
13”
MDP0046
ISL24006IRZ
(See Note)
38-Pin QFN
(Pb-Free)
-
MDP0046
ISL24006IRZ-T7
(See Note)
38-Pin QFN
(Pb-Free)
7”
MDP0046
ISL24006IRZ-T13 38-Pin QFN
(See Note)
(Pb-Free)
13”
MDP0046
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
September 9, 2005
ISL24006
FN6110.1
Features
• 14-channel programmable switchable
• 4-channel static
• Fast switch time (< 1µs)
• Programmable with 20mV resolution
• Digital supply 3.3V to 5V
• Supply current of 32mA (without load)
• Rail-to-Rail capability
• I2C interface
• Pb-free plus anneal available (RoHS compliant)
Applications
• TFT-LCD drive circuits
• Reference voltage generators
Pinout
ISL24006
(38-PIN QFN)
TOP VIEW
OUT_REFU_H 1
AVDD 2
STD_REG 3
A0 4
SDA 5
SCL 6
OSC 7
DVDD 8
BANK_SEL 9
NC 10
GND 11
OUT_REFL_L 12
THERMAL
PAD
31 OUT_REFU_L
30 GND
29 BG
28 GND
27 VREFL_L
26 VREFL_H
25 NC
24 NC
23 VREFU_L
22 VREFU_H
21 AVDD
20 OUT_REFL_H
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2005. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.

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ISL24006 pdf
STANDARD MODE (STD/REG=HIGH) WRITE MODE
= don't care
I2C DATA
Start
Device Address
WA
Control Byte
A
Data 1
A
Data 2
A Data 3
I2C SDA In
A6 A5 A4 A3 A2 A1 A0 W A C7 C6 C5 C4 C3 C2 C1 C0 A D7 D6 D5 D4 D3 D2 D1 D0 A D7 D6 D5 D4 D3 D2 D1 D0 A D7 D6 D5
I2C SDA Out
AAAA
I2C CLK In
123456789123456789123456789123456789123
STANDARD MODE (STD/REG=HIGH) READ MODE
I2C DATA
Start
Device Address
RA
Data 1
A
Data 2
A Data 3
Data 1142 NA
Stop
I2C SDA In
A6 A5 A4 A3 A2 A1 A0 R A
A
A
NA
I2C SDA Out
A D7 D6 D5 D4 D3 D2 D1 D0 A D7 D6 D5 D4 D3 D2 D1 D0 A D7 D6 D5
D2 D1 D0 A
I2C CLK In
123456789123456789123456789123
REGISTER MODE (STD/REG=LO) WRITE MODE
I2C DATA
Start
Device Address
WA
Register Address
A
DATA
A STOP
I2C SDA In
A6 A5 A4 A3 A2 A1 A0 W A X X X X R3 R2 R1 R0 A D7 D6 D5 D4 D3 D2 D1 D0 A
6789
I2C SDA Out
AAA
I2C CLK In
123456789123456789123456789
REGISTER MODE (STD/REG=LO) READ MODE
I2C DATA
Start
Device Address
WA
Register Address
A Device Address R A
I2C SDA In
A6 A5 A4 A3 A2 A1 A0 W A X X X X R3 R2 R1 R0 A A6 A5 A4 A3 A2 A1 A0 R A
DATA
A STOP
NA
I2C SDA Out
A A A D7 D6 D5 D4 D3 D2 D1 D0 A
I2C CLK In
1234567891234567891234567891234567891
Data 124
A Stop
D2 D1 D0 A
A
6789
FIGURE 1. I2C TIMING DIAGRAM 1

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