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PDF WED8L24257V Data sheet ( Hoja de datos )
| Número de pieza | WED8L24257V | |
| Descripción | Asynchronous SRAM | |
| Fabricantes | White Electronic Designs | |
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WED8L24257V
Asynchronous SRAM, 3.3V, 256Kx24
FEATURES
n 256Kx24 bit CMOS Static
n Random Access Memory Array
Fast Access Times: 10, 12, and 15ns
Master Output Enable and Write Control
TTL Compatible Inputs and Outputs
Fully Static, No Clocks
n Surface Mount Package
119 Lead BGA (JEDEC MO-163), No. 391
Small Footprint, 14mmx22mm
Multiple Ground Pins for Maximum Noise Immunity
n Single +3.3V (±5%) Supply Operation
n DSP Memory Solution
Motorola DSP5630x
Analog Devices SHARCTM
DESCRIPTION
The WED8L24257VxxBC is a 3.3V, twelve megabit SRAM con-
structed with three 256Kx8 die mounted on a multi-layer laminate
substrate. With 10 to 15ns access times, x24 width and a 3.3V
operating voltage, the WED8L24257V is ideal for creating a single chip
memory solution for the Motorola DSP5630x (Figure 8) or a two chip
solution for the Analog Devices SHARCTM DSP (Figure 9).
The single or dual chip memory solutions offer improved system
performance by reducing the length of board traces and the number
of board connections compared to using multiple monolithic devices.
The JEDEC Standard 119 lead BGA provides a 69% space savings
over using six 256Kx4, 300 mil wide SOJs and the BGA package
has a maximum height of 110 mils compared to 148 mils for the SOJ
packages. The BGA package also allows the use of the same
manufacturing and inspection techniques as the Motorola DSP, which
is also in a BGA package.
FIG. 1
PIN CONFIGURATION
PIN SYMBOLS
12 3 45 67
A NC AO A1 A2 A3 A4 NC
B NC A5
A6
E A7 A8 NC
C I/012 N C N C N C N C N C I/00
D I/013 VCC GND GND GND VCC I/01
E I/014 GND VCC GND VCC GND I/02
F I/015 VCC GND GND GND VCC I/03
G I/016 GND VCC GND VCC GND I/04
H I/017 VCC GND GND GND VCC I/05
J NC GND VCC GND VCC GND NC
K I/018 VCC GND GND GND VCC I/06
L I/019 GND VCC GND VCC GND I/07
M I/020 VCC GND GND GND VCC I/08
N I/021 GND VCC GND VCC GND I/09
P I/022 VCC GND GND GND VCC I/010
R I/023 N C N C N C N C A17 I/011
T N C A9 A10
W A11 A12 N C
U N C A13 A14
G A15 A16 N C
A0-17
E
W
G
DQ0-23
VCC
GND
NC
PIN NAMES
Address Inputs
Chip Enable
Master Write Enable
Master Output Enable
Common Data Input/Output
Power (3.3V ±5%)
Ground
No Connection
BLOCK DIAGRAM
A0-A17
G
W
E
18
256K x 24
Memory
Array
DQ0-7
DQ8-15
DQ16-23
July 2002 Rev. 1A
ECO #15432
1 White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
1 page  
WED8L24257V
FIG. 7 WRITE CYCLE 2 - E CONTROLLED
tAVAV
A
tAVEH
tELEH
tEHAX
E
tAVEL
W
tWLEH
tDVEH
tEHDX
D DATA VALID
Q HIGH Z
Commercial (0°C to +70°C)
Part Number
WED8L24257V10BC
WED8L24257V12BC
WED8L24257V15BC
Speed
(ns)
10
12
15
ORDERING INFORMATION
Industrial (-40°C to +85°C)
Package
No.
391
391
391
Part Number
WED8L24257V12BI
WED8L24257V15BI
Speed
(ns)
12
15
Package
No.
391
391
PACKAGE NO. 391
119 LEAD BGA
JEDEC MO-163
20.32 (0.800)
TYP
7.62 (0.300)
TYP
0.110 MAX
R 1.52 (0.062)
MAX (4x)
A
B
C
D
E
F 1.27 (0.050)
G TYP
H
J
K
L
M
N
P
R
T
U
14.00 (0.551) TYP
A1
CORNER
22.00 (0.866)
TYP
1.27 (0.050) TYP
0.711 (0.028)
MAX
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
July 2002 Rev. 1A
ECO #15432
5 White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
5 Page | ||
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