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PDF W7020 Data sheet ( Hoja de datos )

Número de pieza W7020
Descripción Bluetooth Radio Module
Fabricantes Lucent 
Logotipo Lucent Logotipo



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No Preview Available ! W7020 Hoja de datos, Descripción, Manual

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Preliminary Data Sheet
September 2000
W7020 Bluetooth* Radio Module
Features
+ Complete Bluetooth RF solution
+ Compliant with Bluetooth specification version 1.0
+ Highly integrated module including an RF
transceiver IC, antenna filter, and transmit/receive
baluns
+ 0 dBm output power at 50
+ 2.7 V operation enabling long battery life
+ 3.2 kHz low-power idle-mode clock
n Digital receive signal strength indicator (RSSI)
n Small-outline module ceramic land grid array
(MCLGA) package (9.7 x 14.0 x 1.6 mm)
Applications
n Cellular phones
n PCs and peripherals
n PDAs
n Consumer appliances
2402 MHz to 2495 MHz
0 dBm/–70 dBm
RX BALUN
ANTENNA
FILTER
ANTENNA
SWITCH
TX BALUN
135°
LNA
90° φ
S
RadTioXASIC
AMPLIFIER
45°
VCO
BUFFER
GLPF
LIMITER
DISCRIMINATOR
RECEIVER
DATA OUT
CLOCK
GENERATION
13 MHz
1 MHz
3.2 kHz
INTEGER N
PLL
13 MHz
XTAL
W7020 RADIO MODULE
TANK
LPF
NOTE: SHADED AREA
IS EXTERNAL TO MODULE
TRANSMITTER
DATA IN
Figure 1. Circuit Block Diagram
*Bluetooth is a trademark of Telefonaktiebolaget LM Ericsson.
UNLOCK PLL

1 page




W7020 pdf
Preliminary Data Sheet
September 2000
W7020 Bluetooth Radio Module
Pin Information
Table 1. Pin Descriptions
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Symbol
GND
TX_CLK
TX_ON
RX_DATA
RX_ON
GND
XO_P
XO_N
POR_EXT
GND
VCC
NC
GND
GND
GND
GND
ANT
18 GND
19 GND
20 VCC_VCO
21 PHD_OFF
22 TX_DATA
23 GND
24 SYNT_ON
25 SI_CLK
26 SI_CMS
27 SI_CDI
28 GND
29 SI_CDO
30 POR
31 LPO_CLK
32 PX_ON
33 SYS_CLK_REQ
34 SYS_CLK
*A = analog; D = digital.
Type*
Ground
D Output
D Input
D Output
D Input
Ground
A Input
A Input
D Input
Ground
Power
Ground
Ground
Ground
Ground
RF 50
Ground
Ground
Power
D Input
D Input
Ground
D Input
D Input
D Input
D Input
Ground
D Output
D Output
D Output
D Input
D Input
D Output
Description
Common ground
1 MHz clock
Transmit power on
Received data input
Receiver power on
Common ground
Crystal positive input
Crystal negative input or external clock input
External power-on reset
Common ground
Common power supply
Not connected
Common ground
Common ground
Common ground
Common ground
Antenna input/output
Common ground
Common ground
VCO power supply
Open PLL
Transmit data input
Common ground
Synthesizer (PLL) powerup
Serial interface clock
Serial interface mode select
Serial interface data input
Common ground
Serial interface data output
Power-on reset
3.2 kHz low-power clock
Packet on
System clock request
System clock
Lucent Technologies Inc.
5

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W7020 arduino
Preliminary Data Sheet
September 2000
W7020 Bluetooth Radio Module
Interface Signal Description
Table 2. Data Interface: CMOS I/O Up to 1 Mbit/s
Pin No.
4
22
Pin Name
RX_DATA
TX_DATA
Function
Connects to baseband and is synchronized to the SYS_CLK signal.
TX data from baseband must be synchronized with TX_CLK signal.
Table 3. Digital Control Inputs: Strobe Signals to Control Various W7020 Features
Pin No.
9
5
3
33
32
24
21
Pin Name
POR_EXT
RX_ON
TX_ON
SYS_CLK_REQ
PX_ON
SYNT_ON
PHD_OFF
Function
Reset will occur on the positive edge of an external power-on-reset signal.
Logic high enables receiving of RX_DATA; low disables RX_DATA.
Logic high enables transmission of TX_DATA; low disables TX_DATA.
Logic high starts up SYS_CLK and TX_CLK outputs (if control register bit 2 set).
Logic high during synchronization at first data packet from master.
Logic high enables the VCO/PLL.
Logic high opens the VCO/PLL control loop.
Table 4. Digital Control Outputs: Output Clocking and Reset Control for the Baseband
Pin No.
2
34
31
30
Pin Name
TX_CLK
SYS_CLK
LPO_CLK
POR
Function
1 MHz transmit clock output, available if POR_EXT & SYS_CLK_REQ are high.
13 MHz reference clock output, available if POR_EXT & SYS_CLK_REQ are high.
3.2 kHz adjustable low-power oscillator clock, available after VCC applied.
Delayed reset signal (<30 ms) (refer to Power-On Reset and XO Start-Up section).
Table 5. Analog Inputs: Connect XTAL Off-Module or External Oscillator Signal (0.4 Vp-p to 1.0 Vp-p)
Pin No.
7
8
Pin Name
XO_P
XO_N
Function
Connect XTAL. Leave unconnected when using external clock.
Connect XTAL or external signal, ac-coupled.
Table 6. Serial Interface: Based on the Boundary-Scan Architecture, IEEE* 1149.1
Pin No.
27
26
25
29
Pin Name
SI_CDI
SI_CMS
SI_CLK
SI_CDO
Function
Control data input; transports serial data to the W7020.
Control mode select; determine transitions from one state to another with the CLK
positive edge.
Control clock; control timing of the serial interface.
Control data out; transports serial data from the W7020 to baseband.
* IEEE is a registered trademark of the Institute of Electrical and Electronic Engineers, Inc.
Lucent Technologies Inc.
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