|
|
Número de pieza | 54ACT373 | |
Descripción | Octal Transparent Latch | |
Fabricantes | National Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de 54ACT373 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
No Preview Available ! www.DataSheet4U.com
August 1998
54AC373 • 54ACT373
Octal Transparent Latch with TRI-STATE® Outputs
General Description
The ’AC/’ACT373 consists of eight latches with TRI-STATE
outputs for bus organized system applications. The flip-flops
appear transparent to the data when Latch Enable (LE) is
HIGH. When LE is LOW, the data that meets the setup time
is latched. Data appears on the bus when the Output Enable
(OE) is LOW. When OE is HIGH, the bus output is in the high
impedance state.
Features
n ICC and IOZ reduced by 50%
n Eight latches in a single package
n TRI-STATE outputs for bus interfacing
n Outputs source/sink 24 mA
n ’ACT373 has TTL-compatible inputs
n Standard Microcircuit Drawing (SMD)
— ’AC373: 5962-87555
— ’ACT373: 5962-87556
Logic Symbols
IEEE/IEC
DS100329-1
Pin Names
D0– D7
LE
OE
O0– O7
Description
Data Inputs
Latch Enable Input
Output Enable Input
TRI-STATE Latch Outputs
DS100329-2
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
FACT® is a registered trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100329
www.national.com
1 page DC Characteristics for ’AC Family Devices (Continued)
Symbol
Parameter
IOZ
IOLD
IOHD
ICC
Maximum
TRI-STATE
Current
(Note 3) Minimum
Dynamic Output
Current
Maximum Quiescent
Supply Current
54AC
VCC
TA =
(V) −55˚C to +125˚C
Guaranteed Limits
5.5 ±5.0
5.5 50
5.5 −50
5.5 80.0
Note 2: All outputs loaded, thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
ICC for 54AC @ 25˚C is identical to 74AC @ 25˚C.
DC Characteristics for ’ACT Family Devices
Symbol
Parameter
VIH Minimum High Level
Input Voltage
VIL Maximum Low Level
Input Voltage
VOH Minimum High Level
Output Voltage
54ACT
VCC
TA =
(V) −55˚C to +125˚C
Guaranteed Limits
4.5 2.0
5.5 2.0
4.5 0.8
5.5 0.8
4.5 4.4
5.5 5.4
VOL Maximum Low Level
Output Voltage
4.5
5.5
4.5
5.5
3.70
4.70
0.1
0.1
IIN
IOZ
ICCT
IOLD
IOHD
ICC
Maximum Input Leakage
Current
Maximum TRI-STATE
Current
Maximum ICC/Input
(Note 6) Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
4.5
5.5
5.5
5.5
5.5
5.5
5.5
5.5
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
Note 7: ICC for 54ACT @ 25˚C is identical to 74ACT @ 25˚C.
0.50
0.50
±1.0
±5.0
1.6
50
−50
80.0
Units
Conditions
VI (OE) = VIL, VIH
µA VI = VCC, GND
VO = VCC, GND
mA VOLD = 1.65V Max
mA VOHD = 3.85V Min
µA VIN = VCC
or GND
Units
Conditions
V VOUT = 0.1V
or VCC − 0.1V
V VOUT = 0.1V
or VCC − 0.1V
V IOUT = −50 µA
(Note 5)
VIN = VIL or VIH
V IOH −24 mA
−24 mA
V IOUT = 50 µA
(Note 5)
VIN = VIL or VIH
V IOL 24 mA
24 mA
µA VI = VCC, GND
µA VI = VIL, VIH
VO = VCC, GND
mA VI = VCC − 2.1V
mA VOLD = 1.65V Max
mA VOHD = 3.85V Min
µA VIN = VCC
or GND
5 www.national.com
5 Page |
Páginas | Total 10 Páginas | |
PDF Descargar | [ Datasheet 54ACT373.PDF ] |
Número de pieza | Descripción | Fabricantes |
54ACT373 | Octal Transparent Latch | National Semiconductor |
54ACT373 | 54AC373 54ACT373 Octal Transparent Latch with TRI-STATE Outputs | Texas Instruments |
54ACT374 | Octal D Flip-Flop | National Semiconductor |
54ACT374 | Octal D Flip-Flop with TRI-STATE Outputs | Texas Instruments |
Número de pieza | Descripción | Fabricantes |
SLA6805M | High Voltage 3 phase Motor Driver IC. |
Sanken |
SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |