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PDF UR5595 Data sheet ( Hoja de datos )
| Número de pieza | UR5595 | |
| Descripción | DDR TERMINATION REGULATOR | |
| Fabricantes | Unisonic Technologies | |
| Logotipo |  |
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UNISONIC TECHNOLOGIES CO., LTD
UR5595
DDR TERMINATION
REGULATOR
MOS IC
DESCRIPTION
The UTC UR5595 is a linear bus termination regulator designed
to meet JEDEC SSTL-2 and SSTL-3 (Stub Series Terminated
Logic) specifications for termination of DDR-SDRAM. The device
contains a high-speed operational amplifier to provide excellent
response to the load transients, and can deliver 1.5A continuous
current and transient peaks up to 3A in the application as required
for DDR-SDRAM termination.
With an independent VSENSE pin, the UR5595 can provide
superior load regulation. The UR5595 provides a VREF output as
the reference for the application of the chipset and DIMMs.
The output, VTT, is capable of sinking and sourcing current while
regulating the output voltage equal to VDDQ/2. The output stage has
been designed to maintain excellent load regulation and with fast
response time to minimum the transition preventing shoot-through.
The UTC UR5595 also incorporates two distinct power rails that
separates the analog circuitry (AVIN) from the power output stage
(PVIN). This power rail split can be utilized to reduce the internal
power dissipation. And this also permits UTC UR5595 to provide a
termination solution for DDRII SDRAM.
*Pb-free plating product number: UR5595L
FEATURES
* Power regulating with driving and sinking capability
* Low output voltage offset
* No external resistors required
* Low external component count
* Linear topology
* Low cost and easy to use
* Thermal shutdown protection
ORDERING INFORMATION
Ordering Number
Normal
Lead Free Plating
UR5595-S08-R
UR5595L-S08-R
UR5595-S08-T
UR5595L-S08-T
UR5595-SH2-R
UR5595L-SH2-R
UR5595-SH2-T
UR5595L-SH2-T
Package
SOP-8
SOP-8
HSOP-8
HSOP-8
Packing
Tape Reel
Tube
Tape Reel
Tube
www.unisonic.com.tw
Copyright © 2005 Unisonic Technologies Co., Ltd
1 of 12
QW-R502-062,A
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UR5595
MOS IC
PIN DESCRIPTIONS
AVIN , PVIN
Input supply pins. AVIN and PVIN are two independent input supply pins for UR5595. AVIN is used to supply all the
internal analog circuits and PVIN is only used to supply the output stage to create the regulated VTT. Using a higher
PVIN voltages will increase the driving capability of VTT, but the internal power loss will also increase. If the junction
temperature exceeds the thermal shutdown than the UR5595 will enter a shutdown state, where VTT is tri-stated and
VREF remains active.
For SSTL-2 applications, the AVIN and PVIN can be short together at 2.5V to eliminate the need for bypassing
capacitors for the two supply pins separately.
VDDQ
The input pin used to create the internal reference voltage from a resistor divider of two internal 50kΩ resistors for
regulating VTT and to guarantee VTT will track VDDQ/2 precisely. As a remote sense by connecting VDDQ directly to the
2.5V rail for SSTL-2 applications is an optimal implementation of VDDQ at the DIMM. This ensures that the reference
voltage tracks the DDR memory rails precisely without a large voltage drop from the power lines.
VSENSE
The sense pin supply improved remote load regulation; if remote load regulation is not used then the VSENSE pin
must still be connected to VTT. A long trace will cause a significant IR drop resulting in a termination voltage lower at
one end of the bus than the other. Connect VSENSE pin to the middle of the bus to provide a better distribution across
the entire termination bus can reduce the IR drop.
VREF
VREF supply the buffered output of the internal reference voltage (VDDQ/2). It can provide the reference voltage of
the Northbridge chipset and memory. For better performance, a bypass ceramic capacitor of 0.1μF~0.01μF, located
close to the pin, can be used to to help with noise.
VTT
VTT is a regulated output that is used to terminate the bus resistors of DDR-SDRAM. It can precisely track the
VDDQ/2 voltage with the sinking and sourcing current capability. The UTC UR5595 is designed to handle peak
transient currents of up to ± 3A with a fast transient response. If a transient is expected to remain above the
maximum continuous current rating for a significant amount of time then the output capacitor size should be large
enough to prevent an excessive voltage drop.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
5 of 12
QW-R502-062,A
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UR5595
TYPICAL CHARACTERISTICS(Cont.)
MOS IC
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
11 of 12
QW-R502-062,A
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet UR5595.PDF ] | |
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