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PDF MC33025 Data sheet ( Hoja de datos )
| Número de pieza | MC33025 | |
| Descripción | (MC33025 / MC34025) High Speed Single-Ended PWM Controller | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MC34025, MC33025
High Speed Double−Ended
PWM Controller
The MC34025 series are high speed, fixed frequency, double−ended
pulse width modulator controllers optimized for high frequency
operation. They are specifically designed for Off−Line and
DC−to−DC converter applications offering the designer a cost
effective solution with minimal external components. These
integrated circuits feature an oscillator, a temperature compensated
reference, a wide bandwidth error amplifier, a high speed current
sensing comparator, steering flip−flop, and dual high current totem
pole outputs ideally suited for driving power MOSFETs.
Also included are protective features consisting of input and
reference undervoltage lockouts each with hysteresis, cycle−by−cycle
current limiting, and a latch for single pulse metering.
The flexibility of this series allows it to be easily configured for
either current mode or voltage mode control.
Features
• 50 ns Propagation Delay to Outputs
• Dual High Current Totem Pole Outputs
• Wide Bandwidth Error Amplifier
• Fully−Latched Logic with Double Pulse Suppression
• Latching PWM for Cycle−By−Cycle Current Limiting
• Soft−Start Control with Latched Overcurrent Reset
• Input Undervoltage Lockout with Hysteresis
• Low Startup Current (500 mA Typ)
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• Internally Trimmed Reference with Undervoltage Lockout
• 45% Maximum Duty Cycle (Externally Adjustable)
• Precision Trimmed Oscillator
• Voltage or Current Mode Operation to 1.0 MHz
• Functionally Similar to the UC3825
• Pb−Free Packages are Available*
16
Vref
4
Clock
5
RT
CT
6
7
Ramp
Error Amp 3
Output
Noninverting 2
Input
Inverting
Input 1
8
Soft−Start
Oscillator
Error
Amp
5.1V
Reference
UVLO
Latching
PWM and
Steering
Flip Flop
Soft−Start
10 Ground
This device contains 227 active transistors.
Figure 1. Simplified Application
15
VCC
13
VC
14
Output B
11
Output A
Power
12 Ground
9
Current
Limit/
Shutdown
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16
1
16
1
MARKING
DIAGRAMS
16
PDIP−16
P SUFFIX
CASE 648
MC3x025P
AWLYYWWG
1
16
SO−16WB
DW SUFFIX
CASE 751G
MC3x025DW
AWLYYWWG
1
x = 3 or 4
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
PIN CONNECTIONS
Error Amp
Inverting Input
Error Amp
Noninverting Input
Error Amp Output
1
2
3
16 Vref
15 VCC
14 Output B
Clock
RT
CT
Ramp
Soft−Start
4 13
5 12
6 11
7 10
89
(Top View)
VC
Power Ground
Output A
Ground
Current Limit/
Shutdown
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 18 of this data sheet.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
October, 2005 − Rev. 7
1
Publication Order Number:
MC34025/D
1 page  
MC34025, MC33025
0
−5.0
VCC = 15 V
−10
−15
TA = − 55°C
TA = +125°C
TA = + 25°C
−20
−25
−30
0
10 20 30 40
ISource, SOURCE CURRENT (mA)
Figure 8. Reference Voltage Change
versus Source Current
50
66
65.6 VCC = 15 V
65.2
64.8
64.4
64
−55 − 25
0 25 50 75 100 125
TA, AMBIENT TEMPERATURE (°C)
Figure 9. Reference Short Circuit Current
versus Temperature
Vref LINE REGULATION 10 V − 24 V
2.0 ms/DIV
Figure 10. Reference Line Regulation
Vref LINE REGULATION 1.0 mA − 10 mA
2.0 ms/DIV
Figure 11. Reference Load Regulation
4.0
2.0
0
− 2.0
− 4.0
− 6.0
− 8.0
−10
−12
− 50 − 25 0 25 50 75 100 125
TA, AMBIENT TEMPERATURE (°C)
Figure 12. Current Limit Comparator Threshold
Change versus Temperature
1.50
1.46 VCC = 15 V
1.42
1.38
1.34
1.30
−55
−25 0 25 50 75 100
TA, AMBIENT TEMPERATURE (°C)
125
Figure 13. Shutdown Comparator Threshold
Voltage versus Temperature
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5
5 Page 
Vref
RDT 4
5
6
RT CT
MC34025, MC33025
5.0 V
0V
Oscillator
RT
4
5
6
CT
Oscillator
Additional dead time can be added by the addition of a dead
time resistor from Vref to CT. See text on oscillator section for
more information.
Figure 24. Dead Time Addition
The sync pulse fed into the clock pin must be at least 3.9 V. RT
and CT need to be set 10% slower than the sync frequency. This
circuit is also used in voltage mode operation for master/slave
operation. The clock signal would be coming from the master
which is set at the desired operating frequency, while the slave
is set 10% slower.
Figure 25. External Clock Synchronization
9 ISense
The addition of an RC filter will eliminate instability caused by the
leading edge spike on the current waveform. This sense signal
can also be used at the ramp input pin for current mode control.
For ramp compensation it is necessary to know the gain of the
current feedback loop. If a transformer is used, the gain can be
calculated by:
Ai +
RSense
turns ratio
Figure 26. Resistive Current Sensing
9 Rw ISense
9
Rw
0
ISense
Figure 27. Primary Side Current Sensing
Figure 28. Primary or Secondary Side
Current Sensing
The addition of an RC filter will eliminate instability caused by the leading edge spike on the current waveform. This sense signal can also
be used at the ramp input pin for current mode control. For ramp compensation it is necessary to know the gain of the current feedback
loop. The gain can be calculated by:
Ai +
Rw
turns ratio
http://onsemi.com
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet MC33025.PDF ] | |
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