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Número de pieza | NB100LVEP221 | |
Descripción | 1:20 Differential HSTL/ECL/PECL Clock Driver | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! NB100LVEP221
2.5V/3.3V 1:20 Differential
HSTL/ECL/PECL Clock Driver
Description
The NB100LVEP221 is a low skew 1−to−20 differential clock
driver, designed with clock distribution in mind, accepting two clock
sources into an input multiplexer. The two clock inputs are differential
ECL/PECL; CLK1/CLK1 can also receive HSTL signal levels. The
LVPECL input signals can be either differential configuration or
single−ended (if the VBB output is used).
The LVEP221 specifically guarantees low output−to−output skew.
Optimal design, layout, and processing minimize skew within a device
and from device to device.
To ensure tightest skew, both sides of differential outputs should be
terminated identically into 50 W even if only one output is being used.
If an output pair is unused, both outputs may be left open
(unterminated) without affecting skew.
The NB100LVEP221, as with most other ECL devices, can be
operated from a positive VCC supply in LVPECL mode. This allows the
LVEP221 to be used for high performance clock distribution in +3.3 V or
+2.5 V systems. In a PECL environment, series or Thevenin line
terminations are typically used as they require no additional power
supplies. For more information on PECL terminations, designers should
refer to Application Note AND8020/D.
The VBB pin, an internally generated voltage supply, is awvwaw.iDlaatabSlheeett4oU.ctohmis
device only. For single−ended LVPECL input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB and
VCC via a 0.01 mF capacitor and limit current sourcing or sinking to
0.5 mA. When not used, VBB should be left open.
Single−ended CLK input operation is limited to a VCC ≥ 3.0 V in
LVPECL mode, or VEE ≤ −3.0 V in NECL mode.
Features
• 15 ps Typical Output−to−Output Skew
• 40 ps Typical Device−to−Device Skew
• Jitter Less than 2 ps RMS
• Maximum Frequency > 1.0 GHz Typical
• Thermally Enhanced 52−Lead LQFP
• VBB Output
• 540 ps Typical Propagation Delay
• LVPECL and HSTL Mode Operating Range:
VCC = 2.375 V to 3.8 V with VEE = 0 V
• NECL Mode Operating Range:
VCC = 0 V with VEE = −2.375 V to −3.8 V
• Q Output will Default Low with Inputs Open or at VEE
• Pin Compatible with Motorola MC100EP221
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 7
1
http://onsemi.com
MARKING
DIAGRAM*
LQFP−52
FA SUFFIX
CASE 848H
NB100
LVEP221
AWLYYWWG
52
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
Publication Order Number:
NB100LVEP221/D
1 page NB100LVEP221
Table 7. LVNECL DC CHARACTERISTICS VCC = 0 V, VEE = −2.375 V to −3.8 V (Note 10)
−40°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit
IEE
VOH
VOL
VIH
VIL
VBB
VIHCMR
Power Supply Current
Output HIGH Voltage (Note 11)
Output LOW Voltage (Note 11)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Reference Voltage (Note 12)
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 13)
CLK0/CLK0
CLK1/CLK1
100 125 150 104 130 156 116 145 174
−1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895
−1945 −1820 −1600 −1945 −1820 −1600 −1945 −1820 −1600
−1165
−880 −1165
−880 −1165
−880
−1945
−1600 −1945
−1600 −1945
−1600
−1525 −1425 −1325 −1525 −1425 −1325 −1525 −1425 −1325
mA
mV
mV
mV
mV
mV
VEE + 1.2
VEE + 0.3
0.0
−0.9
VEE + 1.2
VEE + 0.3
0.0
−0.9
VEE + 1.2
VEE + 0.3
0.0
−0.9
V
V
IIH Input HIGH Current
IIL Input LOW Current
CLK 0.5
CLK −150
150
0.5
−150
150
0.5
−150
150 mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
10. Input and output parameters vary 1:1 with VCC.
11. All outputs loaded with 50 W to VCC−2.0 V.
12. Single−ended input operation is limited VEE ≤ −3.0V in NECL mode.
13. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 8. HSTL DC CHARACTERISTICS VCC = 3.3 V; VEE = 0 V
0°C
Symbol
Characteristic
Min Typ Max
VIH Input HIGH Voltage
CLK1/CLK1 Vx+100
VIL Input LOW Voltage
CLK1/CLK1 −300
VX Differential Configuration Cross
Point Voltage
680
1600
Vx−100
900
IIH Input HIGH Current
IIL Input LOW Current
CLK1
CLK1
−150
−150
−250
150
25°C
Min Typ
Vx+100
−300
680
−150
−150
−250
Max
1600
Vx−100
900
150
85°C
Min Typ
Vx+100
−300
680
−150
−150
−250
Max
1600
Vx−100
900
150
Unit
mV
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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5
5 Page NB100LVEP221
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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PUBLICATION ORDERING INFORMATION
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Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NB100LVEP221/D
11 Page |
Páginas | Total 11 Páginas | |
PDF Descargar | [ Datasheet NB100LVEP221.PDF ] |
Número de pieza | Descripción | Fabricantes |
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