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PDF AT86RF210 Data sheet ( Hoja de datos )
| Número de pieza | AT86RF210 | |
| Descripción | Z-Link Transceiver | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• 850–930 MHz Output Frequency
• Rx Current: 14.5 mA
• Low Sleep Mode Current: 1 uA
• DSSS Processing and BPSK Modulation/Demodulation
• Battery Voltage Monitoring Circuitry
• 4 mW (6 dBm) Min. Transmit Power @ Vdd = 1.8V
• Serial Peripheral Interface (SPI) Control
• Power Supply Voltage Operating Range: 1.8V to 3.6V
• Low External Component Count
• 48QFN Package
Applications
• Low Band IEEE 802.15.4/ZigBee™-based Systems
• Industrial, Commercial, Home Lighting Control, Security, and HVAC
• Inventory Management
• Health Monitoring
• Wireless PC Peripherals such as Mouse, Keyboard, and Joystick
• Consumer Electronics Remote Controls and Toys
Description
The Atmel AT86RF210 Z-Link™ Transceiver is a fully integated, low-cost ZigBee™
transceiver capable of transmitting and receiving BPSK modulated digital data over a
frequency range of 868 MHz and 902–928 MHz using a minimum number of external
components. It combines excellent RF performance with low cost, small size and low
current consumption. The AT86RF210 includes a crystal stabilized Fractional-N syn-
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thesizer, BPSK transmitter and receiver, and full Direct Sequence Spread Spectrum
Signal (DSSS) processing, including spreading and despreading. The device is fully
compatable with IEEE 802.15.4 and ZigBee standards. It includes internal voltage
regulation and battery monitoring circuitry and requires a minimum number of external
support components.
Figure 1. Block Diagram
Rx In
Low Noise
Amp I/Q Mixer
X
Polyphase
Filter
Sw Out
IF Amp
Demodulator
Ant In T/R Switch
Synthesizer
Despreader
Data Out
Sw In
Tx Out
Power Amp
Modulator
Spreader
SPI Bus
SDO
SDI
SCLK
SEL
AT86RF210
Z-Link™
Transceiver
868/902–928 MHz
Direct Sequence
Spread Spectrum
BPSK Transceiver
Preliminary
Data In
5033AS–WIRE–10/03
1 page  
AT86RF210
Table 7. Serial Configuration Register* (Continued)
Symbol
Parameter
Min Typ Max
TCLKH
CLK hold time
25
TCLKW
CLK pulse width
50
TSDIS
SDI setup time
25
TSDIH
SDI hold time
25
TSDOD
SDO delay time
25
Note: *Rise and fall time is measured 10%–90%. Delay, setup, and hold times are measured 50%–50%
Table 8. Low Battery Detector Characteristics
Symbol
Parameter
Min Typ Max
Lvbat 0
Low voltage battery detector threshold voltage mode
0 (5 bit resolution)
1.5
3.5
Unit
nsec
nsec
nsec
nsec
nsec
Unit
Volt
Table 9. Preliminary PIN Description QFN48
Startup
PIN
Num
Type
Cond
SUB
1 V_I/O
GND
LNARFIN
2 RF_I
NA
LNAVSS
3 RF_I/O
NA
RSWOUT
4 RF_I/O
NA
VSS
ANT
5 RF_I/O
6 RF_I/O
NA
NA
VSS
TSWIN
7 RF_I/O
8 RF_I/O
NA
NA
PAOUT
VSS
VDDA
9 RF_I/O
10
11 V_I
NA
NA
PAREG
12 A_O
NA
VCOVDD
VCOREG
No Connect
No Connect
VCOVSS
VCOTUNE
13 V_I
14 V_I
15
16
17 A_I/O
18 A_I
NA
NA
NA
NA
NA
NA
Description
Substrate connection
Low-noise amplifier RF input
Analog ground for the LNA
Transmit-receive switch out. Signal from ANT is routed through the
TR switch to the LNA input.
Transmit-receive switch isolation ground 1.
Antenna RF input/output. Nominal impedance 50Ω, part of T/R
switch. Routes signal to the LNA or from the PA.
Transmit-receive switch isolation ground 2.
Transmit-receive switch input. Signal from PA comes into TR switch
and is routed to ANT.
PA signal routed into the T/R switch from the PA.
Pin not used
Secondary analog power supply input. Set in proximity to power
amplifier circuits.
PA regulator output. Settable current source output for charging a
large external capacitor during battery operation.
VCO power supply input
External filter cap for the VCO regulator
Pin not used
Pin not used
VCO power supply ground
LO VCO control input. An internal differential varactor diode tunes the
LO frequency. The control voltage should be referenced to LOGND.
5033AS–WIRE–10/03
5
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| PDF Descargar | [ Datasheet AT86RF210.PDF ] | |
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