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PDF ATAM510 Data sheet ( Hoja de datos )
| Número de pieza | ATAM510 | |
| Descripción | MARC4 4-bit MTP Universal Microcontroller | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Programmable System Clock with Prescaler and Five Different Clock Sources
– Up to 8-MHz Crystal Oscillator (System Clock)
– 32-kHz Crystal Oscillator
– RC-oscillator Fully Integrated
– RC-oscillator with External Resistor Adjustment
– External Clock Input
• Wide Supply-voltage Range (2.4 V to 6.2 V)
• Very Low Halt Current
• 4-Kbyte EEPROM, 256 × 4-bit RAM
• 8 Hard and Software Interrupt Priority Levels
• Up to 10 External and 4 Internal Interrupts, Bit Wise Maskable with
Programmable Priority Level
• Up to 34 I/O Lines
• I/O Ports – Bit Wise Configurable with Combined Interrupt Handling
(for Serial I/O Applications)
• 2 × 8-bit Multifunction Timer/Counters
• Coded Reset and Watchdog Timer
• Power-on Reset and “Brown Out” Functions
• Various Power-down Modes
• Efficient, Hardware-controlled Interrupt Handling
• High Level Programming Language qFORTH
• Comprehensive Library of Useful Routines
• Windows® 95/Windows NT® Based Development and Programmer Tools
Description
www.DataSheet4U.com
The ATAM510 is a Multi-time Programmable (MTP) microcontroller which is pin and
functionally compatible to Atmel’s ATAR510 mask programmable microcontroller. It
contains an EEPROM, RAM, up to 34 digital I/O pins, up to 10 maskable external
interrupt sources, 4 maskable internal interrupts, a watchdog timer, an interval timer,
2 × 8-bit multifunction timer/counter modules and a versatile software configurable
on-chip system clock module.
MARC4 4-bit
MTP Universal
Microcontroller
ATAM510
Rev. 4711B–4BMCU–01/05
1 page  
ATAM510
2. MARC4 Architecture
2.1 General Description
The functionality, programming and pinning of the ATAM510 is compatible with the ATAR510
mask programmable microcontroller from Atmel. All on-chip modules are addressed and con-
trolled with exactly the same programming code, so that a program targeted for the ATAR510
can be read directly into the ATAM510 and will operate in the same fashion.
The MARC4 microcontroller consists of an advanced stack-based 4-bit CPU core and on-chip
peripherals. The CPU is based on the Harvard architecture with physically separate program
memory (ROM) and data memory (RAM). Three independent buses, the instruction bus, the
memory bus and the I/O bus, are used for parallel communication between ROM, RAM and
peripherals. This enhances program execution speed by allowing both instruction prefetching,
and a simultaneous communication to the on-chip peripheral circuitry. The extremely powerful
integrated interrupt controller with associated eight prioritized interrupt levels supports fast and
efficient processing of hardware events. The MARC4 is designed for the high-level programming
language qFORTH. The core includes both an expression and a return stack. This architecture
enables high-level language programming without any loss of efficiency or code density.
Figure 2-1. MARC4 Core
Reset
Reset
Clock
System
clock
Sleep
Program
memory
MARC4 CORE
X
Y
PC
SP
RP
RAM
256 x 4-bit
Instruction
bus
Instruction
decoder
Interrupt
controller
I/O bus
Memory bus
TOS
CCR
ALU
On-chip peripheral modules
4711B–4BMCU–01/05
5
5 Page 
Figure 2-6. Interrupt Handling
INT7
ATAM510
7 INT7 active
RTI
6 INT5
5 INT5 active
4 INT3
3 INT3 active
2
1
RTI
INT2
INT2 pending
SWI0
RTI
INT2 active
RTI
0
Main /
Autosleep
Time
INT0 pending
INT0 active
RTI
Main/
Autosleep
Table 2-1. Interrupt Priority Table
Interrupt
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
Priority
Lowest
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↓
Highest
ROM Address
040h
080h
0C0h
100h
140h
180h
1C0h
1E0h
Maskable
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Interrupt Opcode
C8h (SCALL 040h)
D0h (SCALL 080h)
D8h (SCALL 0C0h)
E8h (SCALL 100h)
E8h (SCALL 140h)
F0h (SCALL 180h)
F8h (SCALL 1C0h)
FCh (SCALL 1E0h)
4711B–4BMCU–01/05
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ATAM510.PDF ] | |
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