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PDF AT86RF535A Data sheet ( Hoja de datos )

Número de pieza AT86RF535A
Descripción WiMax Transceiver
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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Features
Single-chip WiMax Transceiver @ 3.5GHz
Fully Differential Design
Low-IF Receiver Architecture; Requires No External Filters
Self Calibration Mode for RX / TX Filters
Supports Channel Bandwidths of 1.75, 3.5, and 7MHz
Modulation up to 64QAM
Ultra-fast Fractional-N Synthesizer
Sensitivity < -68dBm @ 64-QAM, CR=¾, 7MHz BW
Phase Noise Synthesizer: 0.8° (-37dBc)
Low Supply Voltage: 2.7V
TX Output PRF: -12 dBm
RX/TX Operating Current: 200/320mA Typical
Low Power Off Current: < 20µA Typical
56-lead QFN Package
Low External Component Count of only a few Passives
Applications
3.5 GHz Band Wireless Communication Devices
IEEE® 802.16-2004 Radios
Supports OFDM up to 64QAM
Figure 1.
www.DataSheet4U.com
AT86RF535A Block Diagram
LNA
Driver
TX Power
Control
RX Gain
Control
Synthe-
sizer
I
Q
I
Q
Config
Register
CLK
WiMax
Transceiver
802.16-2004
AT86RF535A
Preliminary
5108B–WiMax–2/06

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AT86RF535A pdf
TX Path
Synthesizer
AT86RF535A [Preliminary]
0, 6, 12, and 18dB. The linearity improves as the gain is reduced. The differential inphase
quadraturephase mixer (IQMIX) utilizes a differential bipolar stage with emitter degeneration for
the best linearity performance. A complex driving LO source was chosen for optimal LO leakage
cancellation. The IQMIX has 4, 10, 16, and 22dB switchable gain.
The receive poly phase filter (RXPPF) is designed as a frequency shifted leapfrog structure. The
filter provides three different bandwidths at three different center frequencies. The bandwidth of
this filter is tuned by built-in self test (BIST). The tuning process adjusts the cap values within the
filter after power-up. The tuning can be determined via SPI. Image rejection is calibrated via SPI.
Three digital controlled gain amplifiers (DGA1-3) are used to make necessary amplification
available. Each stage supports the four gain modes 0, 6, 12, and 18dB. An additional fine gain
stage DGB enables gain tuning of approximately ± 6dB in 0.76 dB steps. An output buffer gain
offset matches the voltage swing to the respective BB input stage.
The gain control is completely digital and affects LNA, MIX, and the three DGAs by using the
same granularity for each stage. The BB/MAC provides the gain vector at a separate serial inter-
face. A fast TX/RX switching is possible via TX/RX switch input pins controlled by the BB/MAC.
The Low-IF conversion receiver does not have to amplify DC signals. But the gain setting pro-
duces different offsets in gain stages related to the output. To prevent signal saturation effects
contribution, an offset correction takes place after each gain step. For dynamic range reasons,
every stage has its individual offset correction stage. The DC feedback (DCFB) works as output
offset compensation network which depends on actual gain setting. The internal gain control
operation is optimized for fixed target amplitude. To adapt to different application requirements,
the IQ output buffer DGB has a programmable gain offset from –1.5dB to 6dB in increments of
0.76dB. So, the nominal output voltage can be set between 180mVp and 650mVp. The gain is
controllable via the register. The IQOB is able to drive a capacitive load on all four-output ports
(RXI1, RXI2, RXQ1, RXQ2). The external pin CMD is an output pin, which delivers the common
mode output voltage of the DGB.
The transmit low pass filter (TXLP) filter is band limited concerning emission regulation and
OFDM signals. So the input signal at the four-input ports (TXI1, TXI2, TXQ1, TXQ2) driving the
TXLP could be a digital one but with defined levels. The complex filtered BB signal is upcon-
verted with IQ Low-IF Upconverter IQUC. A complex driving LO source is chosen for optimal LO
leakage cancellation. The output currents of the two mixer stages are added together. The
resulting signal drives the power amplifier control (PAC) block. PAC is a Gilbert cell based cur-
rent domain amplifier. Gain is controlled by DC voltage across the mixer core. In that way linear
to dB gain control is achieved. The BB/MAC provides the gain setting vector at a separate serial
interface.
Voltage controlled oscillator (VCO) works at doubled LO frequency. This enables building com-
plex LO phases for IQMIX and IQUC easily by using a divide by two and reduces load-pulling
effects regarding DC current swing of the integrated PA. The VCO utilizes a differential double-
grounded bipolar stage as core and tank; the latter is made up of an inductive and a capacitive
part in parallel. No external devices are necessary. The capacitive part consists of a digital con-
trolled switch cap tuning array and analog controlled varactor. The main reason to use a
5108B–WiMax–2/06
5

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AT86RF535A arduino
Figure 3. Pinning Information
AT86RF535A [Preliminary]
NIER
NIET
PRX
PTX
RFRX1
RFRX2
VSSRFRX
VDDRFRX
RFTX1
RFTX2
VDDPA
VDDRFTX2
DTB
NRES
PIN1
AT86RF535
PIN2
PIN3
PIN4
PIN5
PIN6
PIN7
PIN8
PIN9
PIN10
PIN11
PIN12
PIN13
PIN14
QFN56
PIN42
PIN41
PIN40
PIN39
PIN38
PIN37
PIN36
PIN35
PIN34
PIN33
PIN32
PIN31
PIN30
PIN29
CVI
CHPO
VSSCHP
VDDCHP
ATB
XTAL1
VSSXTAL
XTAL2
VDDXTAL
VDDDIG3
VSSDIG3
CLK
VSSCLK
VDDCLK
5108B–WiMax–2/06
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