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PDF AT86RF535B Data sheet ( Hoja de datos )

Número de pieza AT86RF535B
Descripción WiMax Transceiver
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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Features
Single-chip 3.5GHz WiMAX Transceiver
Fully Differential Design
Low-IF/Zero-IF Transceiver Architecture; Requires No External Filters
Self Calibration Mode for RX / TX Filters
Support Channel Bandwidths of 3.5, 5.0, 7.0, 8.75MHz, and 10MHz
Modulation up to 64QAM
Ultra-fast Fractional-N Synthesizer
Sensitivity < -74 dBm at 64-QAM, CR=¾, 7MHz BW
Phase Noise Synthesizer: 0.8° (-37dBc)
Low Supply Voltage: 3.0 V
TX Output PRF: 0 dBm, -34 dB EVM
RX/TX Operating Current: 270/315mA Typical
Low Power Off Current: < 20µA Typical
56-lead QFN Package
Low External Component Count
Integrated Self IQ Calibration (no external components or control)
HFDD Support
Applications
3.5 GHz Band Wireless Communication Devices
IEEE® 802.16-2004 Radios
Supports OFDM up to 64QAM
Descriptionwww.DataSheet4U.com
Atmel’s AT86RF535B is a fully integrated, low cost RF 3.5GHz Low-IF/Zero-IF con-
version transceiver for WiMAX applications. It combines excellent RF performance,
small size, and low current consumption. The AT86RF535 chip is fabricated on the
advanced SiGe BiCMOS process AT46000. The transceiver combines LNA, PA
driver, RX/TX mixer, RX/TX filters, VCO, Synthesizer, RX Gain control, and TX Power
control, all fully digitally controlled. Only a minimum number of external components
are required.
3.5GHz WiMAX
Transceiver
AT86RF535B
Preliminary
5190A–WiMAX–4/07

1 page




AT86RF535B pdf
AT86RF535B [Preliminary]
Functional Description
The AT86RF535B is based on the IEEE 802.16-2004 standard. This product will provide trans-
mit, receive, and frequency synthesis functions using the OFDM modulation schemes, as
defined in the above specifications.
The AT86RF535B consists of a frequency-agile RF transceiver intended for use in 3.5-GHz
licensed bands at data rates up to 26Mbps.
Configuration and control registers and a bi-directional data communications interface are avail-
able to communicate with existing baseband devices from different vendors. The AT86RF535B
addresses the requirements of base station (BS) as well as subscriber stations (SS) equipment.
The device will operate down to 3.0V.
The AT86RF535 is fabricated in Atmel’s AT46000 advanced SiGe BiCMOS process technology
and is assembled in a 8mm x 8mm 56-lead QFN package.
www.DataSheet4U.com
RX Path
The differential low noise amplifier (DLNA) makes use of a differential bipolar stage with resistive
emitter linearization. For digital gain control operation the DLNA supports the four gain modes 0,
6, 12, and 18dB. The linearity improves as the gain is reduced.
The differential inphase quadrature phase mixer (IQMIX) utilizes a differential bipolar stage with
emitter degeneration for the best linearity performance. A complex driving LO source is chosen
for optimal LO leakage cancellation. The IQMIX has 4, 10, 16, and 22dB of switchable gain.
The receive poly phase filter (RXPPF) is designed as a frequency shifted leapfrog structure. The
filter provides three different bandwidths at three different center frequencies. The bandwidth of
this filter is tuned by a built-in self-test (BIST). The PPF filter cap values are automatically
adjusted upon power-up. The cap tuning can be recalled via SPI. Image rejection is also cali-
brated upon request via SPI.
There are also three digitally controlled gain amplifiers (DGA1-3) available to provide the neces-
sary amplification for the receive signal. Each stage supports the four gain modes 0, 6, 12, and
18dB, respectively. An additional fine gain stage DGB enables gain tuning of approximately ±
6dB in 0.76 dB steps. An output buffer with gain offset matches the voltage swing of the radio to
the respective Baseband input stage.
The gain control is complete digital and affects LNA, MIX, and the three DGAs by using the
same granularity for each stage. The BB/MAC provides the gain vector at a separated serial
interface.
Fast TX/RX switching is possible via TX/RX switch input pins controlled by BB/MAC.
The low-IF conversion receiver does not have to amplify DC signals, but the gain setting process
produces different offsets in gain stages. An offset correction takes place after each gain step in
the receiver to prevent signal saturation. Every stage has an individual offset correction circuit to
maintain the correct overall dynamic range. The DC feedback (DCFB) works as an output offset
compensation network, which depends on actual gain setting.
The internal gain control operation is optimized for fixed target amplitude. To adapt to different
application requirements, the IQ Output Buffer DGB has a programmable gain offset from –
1.5dB to 6dB in increments of 0.76dB. This allows the nominal output voltage to be set between
180mVp and 650mVp. The gain is controllable via the register setting. The IQOB is able to drive
5190A–WiMAX–4/07
5

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AT86RF535B arduino
Figure 3. Pin Information
AT86RF535B [Preliminary]
www.DataSheet4U.com
FSW
VSSDPLL
PIN1
AT86RF535B
PIN2
VDDDPLL
VDDBBIF
PIN3
PIN4
PTX
RFRX1
PIN5
PIN6
RFRX2 PIN7
VSSRFRX
VDDRFRX
ATB
VDDRFTX1
PIN8
PIN9
PIN10
PIN11
VDDRFTX1 PIN12
VDDRFTX2
VDDRFTX2
PIN13
PIN14
QFN56
PIN42
PIN41
PIN40
PIN39
PIN38
PIN37
PIN36
PIN35
PIN34
PIN33
PIN32
PIN31
PIN30
PIN29
VDDBBRX
VSSBBRX
BBRXQN
BBRXQP
BBRXIP
BBRXIN
VCMD
VDDBBTX
BBTXQN
BBTXQP
BBTXIP
BBTXIN
NRES
SDO
5190A–WiMAX–4/07
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