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PDF ISL14010 Data sheet ( Hoja de datos )
| Número de pieza | ISL14010 | |
| Descripción | (ISL14010 / ISL14017) Low Jitter Clock Generators | |
| Fabricantes | Intersil Corporation | |
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Data Sheet
ISL14010, ISL14017
April 16, 2007
FN6407.1
Low Jitter Clock Generators for Set-Top
Box
The ISL14010 series of devices are general purpose
integrated Clock Synthesizers and Generators suited for
consumer applications such as Set-top Box, and various
other consumer applications.
The selectable reference input accepts 30MHz signal either
from crystal or an external source. It is specified to operate
with a nominal 3.3V supply and is offered in 16 Ld QFN
package.
Contact Factory for other output frequency options.
Ordering Information
PART
NUMBER
PART
TEMP.
PKG.
MARKING RANGE (°C) PACKAGE DWG. #
ISL14010IRZ* 10IZ
-40 to +85 16 LD QFN L16.3x3
ISL14017IRZ* 17IZ
-40 to +85 16 LD QFN L16.3x3
*Add "-T" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
www.DataSheet4U.copmroducts are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Selection Table
PART
INPUT NUMBER OF OUTPUT
OPTIONS FREQUENCY OUTPUTS FREQUENCY PACKAGE
ISL14010 30MHz
4 LVTTL 25, 30, 48, 54 16 LD QFN
ISL14017 30MHz
4 LVTTL 25, 30, 40, 50 16 LD QFN
Features
• LVTTL Outputs
• Selectable Crystal or Ref. Clock for Inputs
• Period Jitter ~50ps RMS
• Single Supply; 3.3V nominal
• Extended Temperature Range: -40ºC to +85ºC
• Available in small foot print package
- 16 Ld QFN 3mmx3mm
• Pb-Free plus anneal available (RoHS Compliant)
Applications
• Set-Top Boxes
Pinout
ISL14010, ISL14017
(16 LD QFN)
TOP VIEW
16 15 14 13
VCC 1
X1 2
X2 3
GND 4
12 NC
11 CLK3
10 CLK2
9 NC
5678
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006, 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL14010, ISL14017
Package Outline Drawing
L16.3x3
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 2, 4/07
6
PIN 1
INDEX AREA
3.00
A
B
4X 1.5
12X 0.50
13
16
6
PIN #1 INDEX AREA
12 1
1 .50 ± 0 . 15
(4X) 0.15
TOP VIEW
94
85
16X 0.40 ± 0.10
BOTTOM VIEW
0.10 M C A B
+ 0.07
4 16X 0.23 - 0.05
( 2. 80 TYP )
( 1. 50 )
0 . 90 ± 0.1
( 12X 0 . 5 )
SIDE VIEW
SEE DETAIL "X"
0.10 C
C
BASE PLANE
SEATING PLANE
0.08 C
( 16X 0 . 23 )
( 16X 0 . 60)
TYPICAL RECOMMENDED LAND PATTERN
C
0 . 2 REF
5
0 . 00 MIN.
0 . 05 MAX.
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
5 FN6407.1
April 16, 2007
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet ISL14010.PDF ] | |
Hoja de datos destacado
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| ISL14017 | (ISL14010 / ISL14017) Low Jitter Clock Generators | Intersil Corporation |
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