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PDF X9258 Data sheet ( Hoja de datos )

Número de pieza X9258
Descripción Quad Digital Controlled Potentiometers
Fabricantes Intersil Corporation 
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®
Data Sheet
X9258
Low Noise/Low Power/2-Wire Bus/256 Taps
August 30, 2006
FN8168.4
Quad Digital Controlled Potentiometers
(XDCP™)
FEATURES
• Four potentiometers in one package
• 256 resistor taps/pot–0.4% resolution
• 2-wire serial interface
• Wiper resistance, 40Ω typical @ V+ = 5V, V- = -5V
• Four nonvolatile data registers for each pot
• Nonvolatile storage of wiper position
• Standby current <5µA max (total package)
• Power supplies
—VCC = 2.7V to 5.5V
—V+ = 2.7V to 5.5V
—V- = -2.7V to -5.5V
• 100kΩ, 50kΩ total pot resistance
• High reliability
—Endurance – 100,000 data changes per bit per
register
—Register data retention – 100 years
• 24 Ld SOIC, 24 Ld TSSOP
• Dual supply version of X9259
• Pb-free plus anneal available (RoHS compliant)
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DESCRIPTION
The X9258 integrates 4 digitally controlled
potentiometers (XDCP) on a monolithic CMOS
integrated circuit.
The digitally controlled potentiometer is implemented
using 255 resistive elements in a series array.
Between each element are tap points connected to the
wiper terminal through switches. The position of the
wiper on the array is controlled by the user through the
2-wire bus interface. Each potentiometer has
associated with it a volatile Wiper Counter Register
(WCR) and 4 nonvolatile Data Registers (DR0:DR3)
that can be directly written to and read by the user.
The contents of the WCR controls the position of the
wiper on the resistor array though the switches. Power
up recalls the contents of DR0 to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two-terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
BLOCK DIAGRAM
VCC
VSS
V+
V-
WP
SCL
SDA
A0
A1
A2
A3
Interface
and
Control
Circuitry
8
Data
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Pot 0
VH0/RH0
VL0/RL0
VW0/RW0
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot 2
VH2/RH2
VL2/RL2
VW2/RW2
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
VW1/RW1
Resistor
Array
Pot 1
VH1/RH1
VL1/RL1
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot 3
VW3/RW3
VH3/RH3
VL3/RL3
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 page




X9258 pdf
ACK Polling Sequence
Nonvolatile Write
Command Completed
EnterACK Polling
Issue
START
Issue Slave
Address
ACK
Returned?
Yes
No
Further
Operation?
No
Yes
Issue
Instruction
Proceed
Issue STOP
Issue STOP
Proceed
X9258
Four of the nine instructions end with the transmission
of the instruction byte. The basic sequence is
illustrated in Figure 3. These two-byte instructions
exchange data between the Wiper Counter Register
and one of the data registers. A transfer from a Data
Register to a Wiper Counter Register is essentially a
write to a static RAM. The response of the wiper to this
action will be delayed tWRL. A transfer from the Wiper
Counter Register (current wiper position), to a data
register is a write to nonvolatile memory and takes a
minimum of tWR to complete. The transfer can occur
between one of the four potentiometers and one of its
associated registers; or it may occur globally, wherein
the transfer occurs between all of the potentiometers
and one of their associated registers.
Four instructions require a three-byte sequence to
complete. These instructions transfer data between
the host and the X9258; either between the host and
one of the data registers or directly between the host
and the Wiper Counter Register. These instructions
are: Read Wiper Counter Register (read the current
wiper position of the selected pot), Write Wiper
Counter Register (change current wiper position of the
selected pot), Read Data Register (read the contents
of the selected nonvolatile register) and Write Data
Register (write a new value to the selected data
register). The sequence of operations is shown in
Figure 4.
Instruction Structure
The next byte sent to the X9258 contains the
instruction and register pointer information. The four
most significant bits are the instruction. The next four
bits point to one of the two pots and when applicable
they point to one of four associated registers. The
format is shown below in Figure 2.
Figure 2. Instruction Byte Format
Register
Select
I3 I2 I1 I0 R1 R0 P1 P0
Instructions
Wiper Counter
Register Select
The four high order bits define the instruction. The
next two bits (R1 and R0) select one of the four
registers that is to be acted upon when a register
oriented instruction is issued. The last bits (P1, P0)
select which one of the four potentiometers is to be
affected by the instruction.
5
FN8168.4
August 30, 2006

5 Page





X9258 arduino
SYMBOL TABLE
WAVEFORM INPUTS
OUTPUTS
Must be
steady
Will be
steady
May change
from Low to
High
May change
from High to
Low
Don’t Care:
Changes
Allowed
N/A
Will change
from Low to
High
Will change
from High to
Low
Changing:
State Not
Known
Center Line
is High
Impedance
X9258
Guidelines for Calculating Typical Values of Bus
Pull-Up Resistors
120
100
RMIN
=
VCC MAX
IOL MIN
=1.8kΩ
80
RMAX
=
tR
CBUS
60
Max.
Resistance
40
20 Min.
Resistance
0
0 20 40 60
80 100 120
Bus Capacitance (pF)
11 FN8168.4
August 30, 2006

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