AT24C128B Datasheet PDF - ATMEL Corporation
| Part Number | AT24C128B | |
| Description | Two-wire Serial EEPROM | |
| Manufacturers | ATMEL Corporation | |
| Logo |  |
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1. Features
• Low-voltage and Standard-voltage Operation
– 1.8 (VCC = 1.8V to 5.5V)
• Internally Organized as 16,384 x 8
• Two-wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 1 MHz (5.5V, 2.5V), and 400 kHz (1.8V) Compatibility
• Write Protect Pin for Hardware and Software Data Protection
• 64-byte Page Write Mode (Partial Page Writes Allowed)
• Self-timed Write Cycle (5 ms Max)
• High Reliability
– Endurance: One Million Write Cycles
– Data Retention: 40 Years
• Lead-free/Halogen-free
• 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini MAP, 8-lead Ultra Lead
Frame Land Grid Array (ULA), 8-lead TSSOP, and 8-ball dBGA2 Packages
• Die Sales: Wafer Form, Tape and Reel and Bumped Wafers
Two-wire Serial
EEPROM
128K (16,384 x 8)
AT24C128B
2. Description
The AT24C128B provides 131,072 bits of serial electrically erasable and programma-
ble read-only memory (EEPROM) organized as 16,384 words of 8 bits each. The
device’s cascadable feature allows up to eight devices to share a common two-wire
bus. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operation are essential. The devices are available
in space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini
MAP, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP, and 8-ball
dBGA2 packages. In addition, the entire family is available in a 1.8V (5.5V to 3.6V)
version.
8-lead PDIP
8-lead SOIC
Table 0-1. Pin Configurations
Pin Name
Function
A0
A1
A2
GND
1
2
3
4
8 VCC
A0
7 WP
A1
6 SCL
A2
5 SDA GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
A0–A2
SDA
SCL
WP
GND
Address Inputs
Serial Data
Serial Clock Input
Write Protect
Ground
8-lead dBGA2
VCC 8
WP 7
SCL 6
SDA 5
1 A0
2 A1
3 A2
4 GND
8-lead TSSOP
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
Bottom View
8-lead Ultra Lead Frame Land Grid Array
VCC 8
1 A0
WP 7
2 A1
SCL 6
3 A2
SDA 5
4 GND
8-lead Ultra Thin Mini MAP
VCC 8
WP 7
SCL 6
SDA 5
1 A0
2 A1
3 A2
4 GND
Bottom View
Bottom View
Not Recommended
for New Design
Rev. 5296A–SEEPR–1/08
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AT24C128B
Table 5-3. AC Characteristics (Industrial Temperature)
Applicable over recommended operating range from TAI = 40C to +85C, VCC = +1.8V to +5.5V, CL = 100 pF (unless oth-
erwise noted). Test conditions are listed in Note 2.
1.8-volt
2.5, 5.5-volt
Symbol
Parameter
Min Max Min Max Units
fSCL
tLOW
tHIGH
ti
tAA
tBUF
Clock Frequency, SCL
400 1000
Clock Pulse Width Low
1.3
0.4
Clock Pulse Width High
Noise Suppression Time(1)
0.6 0.4
100
50
Clock Low to Data Out Valid
0.05 0.9 0.05 0.55
Time the bus must be free before a
new transmission can start(1)
1.3
0.5
kHz
µs
µs
ns
µs
µs
tHD.STA
tSU.STA
tHD.DAT
tSU.DAT
tR
tF
tSU.STO
tDH
tWR
Endurance(1)
Start Hold Time
Start Set-up Time
Data In Hold Time
Data In Set-up Time
Inputs Rise Time(1)
Inputs Fall Time(1)
Stop Set-up Time
Data Out Hold Time
Write Cycle Time
25°C, Page Mode, 3.3V
0.6 0.25
µs
0.6 0.25
µs
00
µs
100 100
ns
0.3 0.3 µs
300 100 ns
0.6 0.25
µs
50 50
ns
5 5 ms
1,000,000
Write
Cycles
Notes:
1. This parameter is ensured by characterization and is not 100% tested.
2. AC measurement conditions:
RL (connects to VCC): 1.3 k (2.5V, 5.5V), 10 k (1.8V)
Input pulse voltages: 0.3 VCC to 0.7 VCC
Input rise and fall times: 50 ns
Input and output timing reference voltages: 0.5 VCC
5296A–SEEPR–1/08
5
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| Information | Total 23 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ AT24C128B.PDF Datasheet ] | |
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