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PDF ATA3741 Data sheet ( Hoja de datos )

Número de pieza ATA3741
Descripción UHF ASK Receiver IC
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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Features
Minimal External Circuitry Requirements, No RF Components on the PC Board Except
Matching to the Receiver Antenna
High Sensitivity, Especially at Low Data Rates
Sensitivity Reduction Possible Even While Receiving
Fully Integrated VCO
Low Power Consumption Due to Configurable Self Polling with a Programmable Time
Frame Check
Supply Voltage 4.5V to 5.5V
Operating Temperature Range –40°C to +105°C
Single-ended RF Input for Easy Adaptation to λ / 4 Antenna or Printed Antenna on PCB
Low-cost Solution Due to High Integration Level
ESD Protection According to MIL-STD. 883 (4 KV HBM) Except Pin POUT (2 KV HBM)
High Image Frequency Suppression due to 1 MHz IF in Conjunction with a SAW
Front-end Filter
– Up to 40 dB is Thereby Achievable with Newer SAWs
Programmable Output Port for Sensitivity Selection or for Controlling External
Periphery
Communication to the Microcontroller Possible via a Single, Bi-directional Data Line
Power Management (Polling) is also Possible by Means of a Separate Pin via the
Microcontroller
2 Different IF Bandwidth Versions are Available (300 kHz and 600 kHz)
UHF ASK
Receiver IC
ATA3741
1. Description
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The ATA3741 is a multi-chip PLL receiver device supplied in an SO20 package. It has
been specially developed for the demands of RF low-cost data transmission systems
with low data rates from 1 kBaud to 10 kBaud (1 kBaud to 3.2 kBaud for FSK) in
Manchester or Bi-phase code. The receiver is well-suited to operate with Atmel's PLL
RF transmitter U2741B. Its main applications are in the areas of telemetering, security
technology, and keyless-entry systems. It can be used in the frequency receiving
range of f0 = 300 MHz to 450 MHz for ASK or FSK data transmission. All the state-
ments made below refer to 433.92-MHz and 315-MHz applications.
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ATA3741 pdf
ATA3741
fLO is determined by the RF input frequency fRF and the IF frequency fIF using the following for-
mula:
fLO = fRF fIF
To determine fLO, the construction of the IF filter must be considered at this point. The nominal IF
frequency is fIF = 1 MHz. To achieve a good accuracy of the filter’s corner frequencies, the filter
is tuned by the crystal frequency fXTO. This means that there is a fixed relation between fIF and
fLO that depends on the logic level at pin mode. This is described by the following formulas:
MODE
=
0 (USA) fIF
=
-f--L---O---
314
MODE
=
1
(Europe) fIF
=
------f-L---O-------
432.92
The relation is designed to achieve the nominal IF frequency of fIF = 1 MHz for most applica-
tions. For applications where fRF = 315 MHz, MODE must be set to “0”. In the case of
fRF = 433.92 MHz, MODE must be set to ”1”. For other RF frequencies, fIF is not equal to 1 MHz.
fIF is then dependent on the logical level at pin MODE and on fRF. Table 3-1 summarizes the dif-
ferent conditions.
The RF input either from an antenna or from a generator must be transformed to the RF input
pin LNA_IN. The input impedance of LNA_IN is specified in “Electrical Characteristics” on page
23. The parasitic board inductances and capacitances also influence the input matching. The RF
receiver ATA3741 exhibits its highest sensitivity at the best signal-to-noise ratio in the LNA.
Hence, noise matching is the best choice for designing the transformation network.
A good practice when designing the network is to start with power matching. From that starting
point, the values of the components can be varied to some extent to achieve the best sensitivity.
If a SAW is implemented into the input network, a mirror frequency suppression of PRef = 40 dB
can be achieved. There are SAWs available that exhibit a notch at f = 2 MHz. These SAWs
work best for an intermediate frequency of IF = 1 MHz. The selectivity of the receiver is also
improved by using a SAW. In typical automotive applications, a SAW is used.
Figure 3-2 on page 6 shows a typical input matching network for fRF = 315 MHz and
fRF = 433.92 MHz using a SAW. Figure 3-3 on page 6 illustrates an input matching to 50with-
out a SAW. The input matching networks shown in Figure 3-3 are the reference networks for the
parameters given in the “Electrical Characteristics” on page 23.
Table 3-1. Calculation of LO and IF Frequency
Conditions
Local Oscillator Frequency
fRF = 315 MHz, MODE = 0
fRF = 433.92 MHz, MODE = 1
fLO = 314 MHz
fLO = 432.92 MHz
Intermediate Frequency
fIF = 1 MHz
fIF = 1 MHz
300 MHz < fRF < 365 MHz, MODE = 0
fLO
=
------f--R----F-------
1 + ----1-----
314
fIF
=
-f--L---O---
314
365 MHz < fRF < 450 MHz, MODE = 1
fLO
=
-----------f-R----F-----------
1 + --------1---------
432.92
fIF
=
------f--L--O-------
432.92
4899B–RKE–10/06
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ATA3741 arduino
ATA3741
5.2 Polling Mode
As shown in Figure 3-2 on page 6, the receiver stays in polling mode in a continuous cycle of
three different modes. In sleep mode, the signal processing circuitry is disabled for the time
period TSleep while consuming a low current of IS = ISoff. During the start-up period, TStartup, all sig-
nal processing circuits are enabled and settled. In the following bit-check mode, the incoming
data stream is analyzed bit by bit against a valid transmitter signal. If no valid signal is present,
the receiver is set back to sleep mode after the period TBitcheck. This period varies check by
check as it is a statistical process. An average value for TBitcheck is given in “Electrical Character-
istics” on page 23. During TStartup and TBitcheck the current consumption is IS = ISon. The average
current consumption in polling mode is dependent on the duty cycle of the active mode and can
be calculated as:
ISpoll
=
I--S---o---f-f---×------T----S---l-e---e--p----+-----I--S---o---n----×------(--T----S---t-a---r--t-u--p-----+----T----B---i--t-c--h---e--c---k--)-
TSleep + TStartup + TBitcheck
During TSleep and TStartup, the receiver is not sensitive to a transmitter signal. To guarantee the
reception of a transmitted command, the transmitter must start the telegram with an adequate
preburst. The required length of the preburst is dependent on the polling parameters TSleep, TStar-
tup, TBitcheck, and the startup time of a connected microcontroller (TStart_µC). TBitcheck thus depends
on the actual bit rate and the number of bits (NBitcheck) to be tested.
The following formula indicates how to calculate the preburst length.
TPreburst TSleep + TStartup + TBitcheck + TStart_µC
5.2.1
Sleep Mode
The length of period TSleep is defined by the 5-bit word Sleep of the OPMODE register, on the
extension factor XSleep according to Figure 5-4 on page 13, and on the basic clock cycle TClk. It is
calculated to be:
TSleep = Sleep × XSleep × 1024 × TClk
In US and European applications, the maximum value of TSleep is about 60 ms if XSleep is set to 1.
The time resolution is about 2 ms in that case. The sleep time can be extended to almost half a
second by setting XSleep to 8. XSleep can be set to 8 by bit XSleepStd or by bit XSleepTemp, resulting in
a different mode of action as described below:
XSleepStd = 1 implies the standard extension factor. The sleep time is always extended.
XSleepTemp = 1 implies the temporary extension factor. The extended sleep time is used as long
as every bit check is OK. If the bit check fails once, this bit is set back to 0 automatically, result-
ing in a regular sleep time. This functionality can be used to save current in the presence of a
modulated disturber similar to an expected transmitter signal. The connected microcontroller is
rarely activated in that condition. If the disturber disappears, the receiver switches back to regu-
lar polling and is again sensitive to appropriate transmitter signals.
As seen in Table 5-6 on page 19, the highest register value of Sleep sets the receiver to a per-
manent sleep condition. The receiver remains in that condition until another value for Sleep is
programmed into the OPMODE register. This function is desirable where several devices share
a single data line.
4899B–RKE–10/06
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