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PDF ATA6026 Data sheet ( Hoja de datos )
| Número de pieza | ATA6026 | |
| Descripción | H-bridge Motor Driver | |
| Fabricantes | ATMEL Corporation | |
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Features
• PWM and Direction-controlled Driving of Four Externally Powered NMOS Transistors
• Internal Charge Pump Provides Gate Voltages for High-side Drivers in Permanent ON
Mode and Supplies the Gate of the External Battery Reverse Protection NMOS
• 5V Regulator With External Power Device (NPN) and Current Limitation Function
• Reset Derived From 5V Regulator Output Voltage
• Sleep Mode With Supply Current of Typical 35 µA, Wake-up by Signal on Pin EN or on
SCI Interface (Pin /DATA)
• Window Watchdog; the Watchdog Time is Programmable by Choosing a Certain Value
of the External Watchdog Capacitor CCWD and the External Watchdog Resistor RCWD
• Battery Overvoltage Protection and Battery Undervoltage Management
• Overtemperature Protection
• SCI Transceiver (Operating in Differential or Single-ended Mode) for Use at Battery
Voltage Level
• Digital Control Block With the Control Pins EN, DIR, PWM
• Internal Low-power Regulator With Low-power Band Gap (Trimmed With Four Bits) to
Guarantee Power Dissipation in Sleep Mode and to Guarantee Parameters for Wake-up
H-bridge Motor
Driver
ATA6026
1. Description
The ATA6026 is used to drive a continuous-current motor in a full H-bridge configura-
tion. An external microcontroller controls the driving function of the ATA6026 by
providingwww.DataSheet4U.com a PWM signal and a direction signal, and allows the usage of the ATA6026
in a windshield wiper application, for example.
The ATA6026 supports PWM and direction-controlled driving of four external power
MOSFETs with two external bootstrap capacitors. The PWM control is performed by
the high-side switch. The opposite low-side switch is permanently ON in the driving
phase. Motor braking is performed using the low-side switches. A programmable dead
time is included to prevent peak currents within the H-bridge. The maximum PWM fre-
quency is 30 kHz.
Rev. 4865C–AUTO–01/06
1 page  
ATA6026
3. Functional Description
3.1 Power Supply Unit
3.1.1
Power Supply
The ATA6026 is supplied by a reverse-protected battery voltage. To prevent damage to the IC,
proper external protection circuitry must to be added. Use of a capacitor combination of storage
and HF capacitors behind the reverse protection circuitry and closed to the VBAT pin of the
ATA6026 (Figure 1-1 on page 2) is recommended.
A fully-internal low-power and low-drop regulator with a voltage of 5V and cleaned by an exter-
nal blocking capacitor provides the necessary low-voltage supply needed for the wake-up
process. The low-power band gap is trimmed by OTPDC and is also used for the big regulator.
The following blocks are supplied by the internal regulator:
• Enable input comparator
• Band gap
• Wake-up part of the SCI interface
• Digital control of the complete ATA6026
• OTPDC
• VCC regulator (5V external)
The internal supply voltage VINT must not be used for any other supply reasons!
All the remaining blocks are supplied by the VCC regulator (5V).
For detection reasons by microcontroller, there is a high-voltage switch which brings out the bat-
tery voltage to the pin VBAT_SWITCH. This switch is ON for VCC > VthRES.
3.2 Sleep Mode
Sleep mode exists to guarantee the low quiescent current of the inactive ATA6026. In Sleep
mode it is possible to wake up the IC by using the pins EN or /DATA. The following blocks are
active in Sleep mode:
• Band gap
• Internal 5V regulator with external blocking capacitor of 100 nF
• Input structure for detecting the EN pin threshold
• Wake-up block of SCI receive part
4865C–AUTO–01/06
5
5 Page 
ATA6026
3.6 SCI Transceiver
The SCI transceiver is a differential device which can also work in single-ended mode. In single-
ended mode the levels and the currents are compatible with the LIN interface, but use a faster
timing. It is necessary to define the SCI differential mode by externally pulling down the pin SEM.
Single-ended mode is the default if the pin SEM is left open. In this case, the /DATA pin is active.
The typical external elements on pin DATA are also recommended for single-ended mode (SEM
mode). The driver on pin DATA is passive in single-ended mode.
SEM is a digital input pin with an internal pull-up resistor to VCC. So, in Sleep mode no current
will flow through the pull-up resistor and affect the Sleep mode supply current, as the VCC regu-
lator is down while in Sleep mode.
Figure 3-6. Principal Function of SCI
ACTIVE
VCC
wake_SCI
SCI_Rx
LINM
ACTIVE
≥1
SCIREC
SW3
RS
SW2
RS
SW1
&
10 kΩ
VBAT
1 kΩ
1 nF
/DATA
1 kΩ
1 nF
DATA
SCI_Tx
≥1
Switches SW1, SW2,
SW3 are ON for
control signals = HIGH
RS: both resistors provide VVBAT/2
Definition of symbols in Figure 3-6:
ACTIVE: ATA6026 is in Active mode
SCIREC:
VCC:
wake_SCI:
Receive part of SCI is working
VCC voltage (pin VCC)
Wake-up by SCI performed (for more information on the filter time twakeSCI,
see“Wake-up and Sleep Mode Strategy” on page 6)
SCI_Rx:
Rx output of SCI
SEM:
Single-ended mode of SCI when SEM = HIGH (SEM = “Single-ended Mode”)
VVBAT:
Voltage at pin VBAT (not car battery!)
4865C–AUTO–01/06
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ATA6026.PDF ] | |
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