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IS23SC4418 fiches techniques PDF

ISSI - (IS23SC4418 / IS23SC4428) 1-KBYTE EEPROM

Numéro de référence IS23SC4418
Description (IS23SC4418 / IS23SC4428) 1-KBYTE EEPROM
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IS23SC4418 fiche technique
IIIISSSS223322SS33CC44SS4412CC88 44441288
1-KBYTE EEPROM
WITH WRITE PROTECT FUNCTION AND
PROGRAMMABLE SECURITY CODE (PSC)
ISISSSII®®
NOVEMBER 2001
FEATURES
• Standard CMOS process
• 1024 x 8 bits EEPROM organization
• Byte-wise addressing
• Byte-wise erase/write
• Irreversible byte-wise write protection
• Single 5V power supply for read and write/erase
• Low power operation:
– 3 mA typical active current
• 5 ms programming time
• 3-wire serial interface
• 20 KHz serial clock rate
• Contact configuration and serial interface,
ISO standard 7816 (Synchronous Transmission)
www.DataSheet4U.com
compatible.
• High ESD protection: > 4 KV
• High reliability:
– 1,000,000 erase/write cycles guaranteed
– 10 years data retention
• Wide operating temperature range
– 0 to +70°C Commercial; –40 to +85°C Industrial
Additional feature of IS23SC4428:
• 2-byte Programmable Security Code (PSC) for
memory write/erase protection
DESCRIPTION
IS23SC4418
IS23SC4418 contains 1024 x 8 bits of EEPROM with
programmable write protection for each byte. Random
read access to any byte in the memory is always possible.
The memory can also be erased and written byte by byte.
Erasing old data in the byte location must be performed
before new data can be written to the location. Each byte
in the memory has a corresponding protect bit. The
protect bits are only one-time programmable and cannot
be erased. After the protect bits are enabled (logic 0), the
corresponding bytes can never be changed again. A write-protect
bit with data-compare function is available for user to
verify the data in the memory before enabling the protect bit.
IS23SC4428
IS23SC4428 offers all the features in IS23SC4418. In
addition, it offers two bytes of Programmable Security
Code (PSC) against unauthorized memory write/erase
operations. All the memory, except for the PSC can
always be read, but the memory can be written or erased
only after PSC verification. If the user fails to enter the
correct PSC in eight consecutive attempts, the device will
block any further PSC entry attempts and the memory can
never be erased or written again.
The PSC bytes are pre-programmed by the manufacturer
with a code, which is specified for the customer for device
transport security purposes, before the devices are shipped
to the customer. The Error Counter will be pre-erased by
the manufacturer to allow maximum attempts (maximum
of eight) for PSC entry.
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
REV. A
11/01/01
1

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