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PDF M2004-02 Data sheet ( Hoja de datos )
| Número de pieza | M2004-02 | |
| Descripción | Frequency Synthesizer | |
| Fabricantes | ICS | |
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Micro Networkswww.DataSheet4U.com
An Integrated Circuit Systems Company
M2004-02
Preliminary Specifications
M2004-02
Frequency Synthesizer
DESCRIPTION
The M2004-02 integrates a high performance Phase
Locked Loop (PLL) with a Voltage Controlled SAW
Oscillator (VCSO) to provide a low jitter Frequency
Synthesizer in a 9mm x 9mm surface mount
package.
The internal high “Q” SAW filter provides low jitter
signal performance and determines the maximum
output frequency of the VCSO.
FEATURES
Output Clock Frequency up to 700MHz
Internal Low-jitter SAW-based Oscillator
Intrinsic Jitter <1ps rms (12kHz - 20MHz)
Differential Input Compatible with LVPECL,
LVDS, HSTL, SSTL, etc.
Dual Input MUX
Parallel Programming
Tunable Loop Filter Response
Differential LVPECL Outputs
3.3V Operation
Small 9mm x 9mm SMT Package
A programmable output divider can divide the VCSO
frequency to achieve an output as low as 38.88MHz.
The input to the Frequency Synthesizer is provided
by selecting between a differential input clock or a
single ended input clock.
The output frequency is an integer multiple of the
input reference frequency. The multiplying factor is
programmed via a 6 bit parallel address.
An external loop filter sets the PLL bandwidth which
can be optimized to provide jitter attenuation of the
input reference clock.
The bandwidth control, low phase noise, and HOLD
features make the M2004-02 ideal for use as a clock
jitter attenuator, frequency translator, and clock
frequency generator in OC-3 through OC-192
applications.
APPLICATIONS
SONET / SDH / 10GbE System
Synchronization
Add / Drop Muxes, Access and Edge
Switches
Line Card System Clock Cleaner /
Translator
Optical Module Clock Cleaner / Translator
ISO 9001
Registered
Micro Networks 324 Clark Street Worcester, MA 01606 tel: 508-852-5400 fax: 508-852-8456 www.micronetworks.com
1
1 page  
Micro Networks
An Integrated Circuit Systems Company
TABLE 4
Symbol
CIN
RPULLUP
RPULLDOWN
PIN CHARACTERISTICS
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Min
M2004-02
Preliminary Specifications
Typical
51
51
Max
4
Units
pF
kΩ
kΩ
PARALLEL & SERIAL MODES FUNCTION
TABLE 5A
Inputs
MR M
HX
N
X
Conditions
Reset, Forces outputs LOW.
L Data Data Data on M and N inputs passed directly to the M divider and N output divider.
Note: L = Low; H = High; X = Don’t care; ↑ = Rising Edge Transition; ↓ = Falling Edge Transition
PROGRAMMABLE VCSO FREQUENCY FUNCTION
TABLE 5B
VCSO Frequency
32 16
8
4
2
1
(MHz)
M Divide
M5
M4
M3
M2
M1
M0
325 13 0 0 1 1 0 1
350 14 0 0 1 1 1 0
375 15 0 0 1 1 1 1
400 16 0 1 0 0 0 0
• • ••••••
• • ••••••
600 24 0 1 1 0 0 0
625 25 0 1 1 0 0 1
650 26 0 1 1 0 1 0
NOTE 1: These M divide values and the resulting frequencies correspond to a reference frequency of 25MHz.
Micro Networks 324 Clark Street Worcester, MA 01606 tel: 508-852-5400 fax: 508-852-8456 www.micronetworks.com
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