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PDF TYN812TRG Data sheet ( Hoja de datos )
| Número de pieza | TYN812TRG | |
| Descripción | SENSITIVE & STANDARD | |
| Fabricantes | STMicroelectronics | |
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® TN12, TS12 and TYNx12 Series
SENSITIVE & STANDARD
12A SCRS
Table 1: Main Features
Symbol
Value
IT(RMS)
12
VDRM/VRRM
600 to 1000
IGT 0.2 to 15
Unit
A
V
mA
DESCRIPTION
Available either in sensitive (TS12) or standard
(TN12 / TYN) gate triggering levels, the 12A SCR
series is suitable to fit all modes of control, found
in applications such as overvoltage crowbar
protection, motor control circuits in power tools
and kitchen aids, inrush current limiting circuits,
capacitive discharge ignition and voltage
regulation circuits...
Available in through-hole or surface-mount
packages, they provide an optimized performance
in a limited space area.
A
G
K
A
A
KA
G
DPAK
(TN12-B / TS12-B)
A
KA
G
D2PAK
(TN12-G)
A
K
A
G
IPAK
(TN12-H / TS12-H)
K
A
G
TO-220AB
(TYNx12RG)
Table 2: Order Codes
Part Numbers
TN1215-x00B
TN1215-x00B-TR
TN1215-x00G
TN1215-x00G-TR
TN1215-x00H
TS1220-x00B
TS1220-x00B-TR
TS1220-x00H
TYNx12RG
TYNx12TRG
Marking
TN1215x00
TN1215x00
TN1215x00G
TN1215x00G
TN1215x00
TS1220x00
TS1220x00
TS1220x00
TYNx12
TYNx12T
October 2005
REV. 5
1/11
1 page  
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TN12, TS12 and TYNx12 Series
Figure 9: Relative variation of dV/dt immunity
versus gate-cathode resistance (typical
values) for TS8 series
dV/dt[RGK] / dV/dt[RGK=220Ω]
10.0
Tj = 125°C
VD = 0.67 x VDRM
1.0
0.1
0
RGK(kΩ)
200
400
600
800
1000
1200
Figure 10: Relative variation of dV/dt immunity
versus gate-cathode capacitance (typical
values) for TS8 series
dV/dt[CGK] / dV/dt[RGK=220Ω]
4.0
VD = 0.67 x VDRM
3.5
Tj = 125°C
RGK = 220Ω
3.0
2.5
2.0
1.5
1.0
0.5
CGK(nF)
0.0
0 25 50 75 100 125 150
Figure 11: Surge peak on-state current versus
number of cycles
Figure 12: Non-repetitive surge peak on-state
current for a sinusoidal pulse with width
tp < 10 ms, and corresponding values of I²t
ITSM(A)
150
140
130
120
110
100
90
80
70 TS12
60
50
40
30
20
Repetitive
TC=105°C
10
0
1
TN12 / TYN12
Non repetitive
Tj initial=25°C
Number of cycles
10 100
tp=10ms
One cycle
1000
ITSM(A), I2t (A2s)
2000
1000
100
dI/dt limitation
ITSM
TS12
Tj initial = 25°C
TN12 / TYN12
TN12 / TYN12
I2t
TS12
10
0.01
tp(ms)
0.10
1.00
10.00
Figure 13: On-state characteristics (maximum
values)
ITM(A)
200
100
Tj max.:
Vt0=0.85V
Rd=30mΩ
Tj=max
10
Tj=25°C
VTM(V)
1
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Figure 14: Thermal resistance junction to
ambient versus copper surface under tab
(epoxy printed circuit board FR4, copper
thickness: 35µm) (DPAK and D2PAK)
Rth(j-a)(°C/W)
100
80
60
DPAK
40
D2PAK
20
S(cm²)
0
0 2 4 6 8 10 12 14 16 18 20
5/11
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TN12, TS12 and TYNx12 Series
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2005 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
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Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
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