KM23C8105DT Datasheet PDF - Samsung Semiconductor
| Part Number | KM23C8105DT | |
| Description | 8M-Bit (1Mx8 /512Kx16) CMOS Mask ROM | |
| Manufacturers | Samsung Semiconductor | |
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KM23C8105D(E)T
CMOS MASK ROM
8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM
FEATURES
• Switchable organization
1,048,576 x 8(byte mode)
524,288 x 16(word mode)
• Fast access time
Random Access : 100ns(Max.)
Page Access : 30ns(Max.)
• 4 Words / 8 bytes page access
• Supply voltage : single +5V
• Current consumption
Operating : 80mA(Max.)
Standby : 50µA(Max.)
• Fully static operation
• All inputs and outputs TTL compatible
• Three state outputs
• Package
-. KM23C8105D(E)T : 44-TSOP2-400
GENERAL DESCRIPTION
The KM23C8105D(E)T is a fully static mask programmable
ROM fabricated using silicon gate CMOS process technology,
and is organized either as 1,048,576 x 8 bit(byte mode) or as
524,288 x 16 bit(word mode) depending on BHE voltage
level.(See mode selection table)
This device includes page read mode function, page read mode
allows 4 words (or 8bytes) of data to read fast in the same
page, CE and A2 ~ A18 should not be changed.
This device operates with a 5V single power supply, and all
inputs and outputs are TTL compatible.
Because of its asynchronous operation, it requires no external
clock assuring extremely easy operation.
It is suitable for use in program memory of microprocessor, and
data memory, character generator.
The KM23C8105D(E)T is packaged in a 44-TSOP2.
FUNCTIONAL BLOCK DIAGRAM
A18
.
.
.
.
.
.
.
.
A2
A0~A1
A-1
CE
OE
BHE
X
BUFFERS
AND
DECODER
Y
BUFFERS
AND
DECODER
CONTROL
LOGIC
MEMORY CELL
MATRIX
(524,288x16/
1,048,576x8)
SENSE AMP.
DATA OUT
BUFFERS
...
Q0/Q8 Q7/Q15
Pin Name
A0 - A1
A2- A18
Q0 - Q14
Q15 /A-1
BHE
CE
OE
VCC
VSS
N.C
Pin Function
Page Address Inputs
Address Inputs
Data Outputs
Output 15(Word mode)/
LSB Address(Byte mode)
Word/Byte selection
Chip Enable
Output Enable
Power ( +5V)
Ground
No Connection
PRODUCT INFORMATION
Product
Operating Vcc Range
Temp Range (Typical)
KM23C8105DT
KM23C8105DET
0°C~70°C
-20°C~85°C
5.0V
Speed
(ns)
100
PIN CONFIGURATION
N.C 1
A18 2
A17 3
A7 4
A6 5
A5 6
A4 7
A3 8
A2 9
A1 10
A0 11
CE 12
VSS 13
OE 14
Q0 15
Q8 16
Q1 17
Q9 18
Q2 19
Q10 20
Q3 21
Q11 22
TSOP2
44 N.C
43 N.C
42 A8
41 A9
40 A10
39 A11
38 A12
37 A13
36 A14
35 A15
34 A16
33 BHE
32 VSS
31 Q15/A-1
30 Q7
29 Q14
28 Q6
27 Q13
26 Q5
25 Q12
24 Q4
23 VCC
KM23C8105D(E)T
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KM23C8105D(E)T
PACKAGE DIMENSIONS
44-TSOP2-400
#44
#1
18.81
0.741MAX.
18.41±0.10
0.725±0.004
(
0.805
0.032
)
0.35±0.10
0.014±0.004
#23
11.76±0.20
0.463±0.008
CMOS MASK ROM
(Unit : mm/inch)
(
0.25
0.010
)
0~8°
0.45 ~0.75
0.018 ~ 0.030
(
0.50
0.020
)
#22
1.00±0.10
0.039±0.004
1.20
0.047
MAX.
0.15
+
-
0.10
0.05
0.006
+
-
0.004
0.002
0.80
0.0315
0.10 MAX
0.004
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for KM23C8105DT electronic component. |
| Information | Total 5 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ KM23C8105DT.PDF Datasheet ] | |
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Featured Datasheets
| Part Number | Description | MFRS |
| KM23C8105D | The function is 8M-Bit (1Mx8 /512Kx16) CMOS Mask ROM. Samsung Semiconductor | |
| KM23C8105DET | The function is 8M-Bit (1Mx8 /512Kx16) CMOS Mask ROM. Samsung Semiconductor | |
| KM23C8105DG | The function is 8M-Bit (1Mx8 /512Kx16) CMOS Mask ROM. Samsung Semiconductor | |
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