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PDF EX29DL320 Data sheet ( Hoja de datos )
| Número de pieza | EX29DL320 | |
| Descripción | Simultaneous Operation Flash Memory | |
| Fabricantes | Excel Semiconductor | |
| Logotipo |  |
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ADVANCED INFORMATION
EE SS II
Excel Semiconductor inc.
ES29DL320
32Mbit(4M x 8/2M x 16)
CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
GENERAL FEATURES
• Single power supply operation
- 2.7V - 3.6V for read, program and erase operations
• Simultaneous Read/Write operations
- Data can be continuously read from one bank while
executing erase/program functions in another bank
- Zero latency between read and write operations
• Multi-Bank architecture
- Read may occur in any of the banks not being
written or erased
- Multi-Bank may be grouped by customer to achieve
desired bank divisions
• Top or Bottom boot block
- ES29DL320T for Top boot block device
- ES29DL320B for Bottom boot block device
• A 256 bytes of extra sector for security code
- Factory locked
- Customer lockable
• Package Options
- 48-pin TSOP
- 48-ball FBGA
- All Pb-free products are RoHS-Compliant
• Low Vcc write inhibit
• Manufactured on 0.18um process technology
• Compatible with JEDEC standards
- Pinout and software compatible with single-power
supply flash standard
DEVICE PERFORMANCE
• Read access time
- 70ns/90ns for normal Vcc range ( 2.7V ~ 3.6V )
• Program and erase time
- Program time : 6us/byte, 8us/word ( typical )
- Accelerated program time : 4us/word ( typical )
- Sector erase time : 0.7sec/sector ( typical )
• Power consumption (typical values)
- 15uA in standby or automatic sleep mode
- 10mA active read current at 5MHz
- 15mA active write current during program or erase
• Minimum 100,000 program/erase cycles per sector
• 20 Year data retention at 125oC
SOFTWARE FEATURES
• Erase Suspend / Erase Resume
• Data# poll and toggle for program/erase status
• CFI ( Common Flash Interface) supported
• Unlock Bypass Program
• Autoselect mode
• Auto-sleep mode after tACC + 30ns
HARDWARE FEATURES
• Hardware reset input pin ( RESET#)
- Provides a hardware reset to device
- Any internal device operation is terminated and the
device returns to read mode by the reset
• Ready/Busy# output pin ( RY/BY#)
- Provides a program or erase operational status
about whether it is finished for read or still being
progressed
• WP#/ACC input pin
- Two outermost boot sectors are protected when
WP# is set to low, regardless of sector protection
- Program speed is accelerated by raising WP#/ACC
to a high voltage (8.5V ~ 9.5V)
• Sector protection / unprotection ( RESET# , A9 )
- Hardware method of locking a sector to prevent
any program or erase operation within that sector
- Two methods are provided :
- In-system method by RESET# pin
- A9 high-voltage method for PROM programmers
• Temporary Sector unprotection ( RESET# )
- Allows temporary unprotection of previously
protected sectors to change data in-system
ES29DL320
1 Rev. 0E May 25, 2006
1 page  
www.DataSheet4U.com
ADVANCED INFORMATION
CONNECTION DIAGRAM
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
WE#
RESET#
NC
WP#/ACC
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48-Pin Standard TSOP
ES29DL320
EE SS II
Excel Semiconductor inc.
48 A16
47 BYTE#
46 Vss
45 DQ15/A-1
44 DQ7
43 DQ14
42 DQ6
41 DQ13
40 DQ5
39 DQ12
38 DQ4
37 Vcc
36 DQ11
35 DQ3
34 DQ10
33 DQ2
32 DQ9
31 DQ1
30 DQ8
29 DQ0
28 OE#
27 Vss
26 CE#
25 A0
48-Ball FBGA 6 x 8 mm)
(Top View, Balls Facing Down)
C
D
E
F
G
HJ
K
7 A13 A12 A14 A15 A16 BYTE# DQ15/ Vss
A-1
6 A9 A8 A10 A11 DQ7 DQ14 DQ13 DQ6
5
WE# RESET#
NC
A19 DQ5 DQ12 Vcc DQ4
4
RY/
BY#
WP#/
ACC
A18
A20 DQ2 DQ10 DQ11 DQ3
3
A7 A17 A6
A5 DQ0 DQ8 DQ9 DQ1
2
A3
A4
A2
A1
A0
CE# OE#
Vss
ES29DL320
5 Rev. 0E May 25, 2006
5 Page 
www.DataSheet4U.com
ADVANCED INFORMATION
EE SS II
Excel Semiconductor inc.
Start
RESET# =
VIH or VID
Wait 1us
Write 60h to
any address
Write 40h to security
sector address with
A6=0, A1=1,A0=0
Read from security
sector address with
A6=0,A1=1,A0=0
If data=00h, security
sector is unprotected.
If data=01h, security
sector is protected
Remove VIH or VID
from RESET#
Write reset
command
Security sector
Protect Verify
complete
Figure 2. Security Sector Protect Verify
Exit from the Security Sector
Once the Security Sector is locked protected and
verified, the system must write the Exit Security
Sector Region command sequence to return to
reading and writing the remainder of the array.
Caution for the Security Sector Protection
The security sector protection must be used with
caution since, once protected, there is no proce-
dure available for unprotecting the security sector
area and none of the bits in the security sector
memory space can be modified in any way.
HARDWARE DATA PROTECTION
The ES29DL320 device provides some protection
measures against accidental erasure or program-
ming caused by spurious system level signals that
may exist during power transition. During power-
up, all internal registers and latches in the device
are cleared and the device automatically resets to
the read mode. In addition, with its internal state
machine built-in the device, any alteration of the
memory contents or any initiation of new operation
can only occur after successful completion of spe-
cific command sequences. And several features are
incorporated to prevent inadvertent write cycles
resulting from Vcc power-up and power-down transi-
tion or system noise.
Low Vcc Write inhibit
When Vcc is less than VLKO, the device does not
accept any write cycles. This protects data during
Vcc power-up and power-down. The command reg-
ister and all internal program/erase circuits are dis-
abled, and the device resets to the read mode.
Subsequent writes are ignored until Vcc is greater
than VLKO. The system must provide proper signals
to the control pins to prevent unintentional writes
when Vcc is greater than VLKO.
Write Pulse “Glitch” Protection
Noise pulses of less than 5ns (typical) on OE#, CE#
or WE# do not initiate a write cycle.
Logical inhibit
Write cycles are inhibited by holding any one of
OE#=VIL, CE#=VIH or WE#=VIH. To initiate a write
cycle, CE# and WE# must be a logical zero while
OE# is a logical one.
Power-up Write Inhibit
If WE#=CE#=VIL and OE#=VIH during power up, the
device does not accept any commands on the rising
edge of WE#. The internal state machine is automat-
ically reset to the read mode on power-up.
ES29DL320
11 Rev. 0E May 25, 2006
11 Page | ||
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| PDF Descargar | [ Datasheet EX29DL320.PDF ] | |
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