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PDF ATSAM9753 Data sheet ( Hoja de datos )
| Número de pieza | ATSAM9753 | |
| Descripción | Integrated Digital Music Instrument | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Interfaces Directly to Instrument Hardware
– Keyboard Velocity Scanner (Up to 88 Keys, 64 µs Time Accuracy, Log Timescale)
– Switch Scanner (Up to 176 Switches)
– LED Display Controller (Up to 88 LEDs)
– Slider Scanner (Built-in ADC, Up to 16 Sliders)
– LCD Display (8-bit Interface)
• Crisp Musical Response
– 45 MHz Built-in 16-bit Microcontroller
– Interface with Keyboard/Switches through Built-in Shared Memory
• High-quality Sound
– 64-slot Digital Sound Synthesizer/Processor
– Multi-algorithm: PCM with Dynamic LP Filter, FM, Delay Lines for Effects,
Equalizer, Surround, Digital Audio-in Processing
www.DataShee–t4UC.ocommpatible with ATSAM97xx Sounds and Firmware
– 44.1 kHz Sampling Rate
– Up to 16 MB x 16 ROM/RAM for Firmware, Orchestration and PCM Data
– Up to 4 Channels Audio-out, 2 Channels Audio-in
• Top Technology
– 144-lead TQFP Space-saving Package
– Single 11.2896 MHz Crystal Operation, Built-in PLL Minimizes RFI
• Available Soundbanks for General MIDI®(GM)(1)or High-quality Piano
– CleanWave® 1-Mbyte and 4-Mbyte Sample Sets (Free License)
– High-quality 2-Mbyte Piano and Strings Sample Sets
– Other Sample Sets Available Under Special Licensing Conditions
• Quick Time-to-market
– Proven Reliable Synthesis Drivers
– In-circuit Emulation with CodeView Debugger for Easy Prototype Development
– Built-in External Flash Programming Algorithm, Allows On-board Flash
Programming
– All Existing ATSAM97xx Tools Available for Sound and Sound-bank Development
Note: 1. General MIDI requires a license from Midi Manufacturers Association.
Sound
Synthesis
ATSAM9753
Integrated
Digital Music
Instrument
Description
The ATSAM9753 integrates into a single chip an ATSAM97xx core (64-slot DSP and
16-bit processor), a 32K x 16 RAM, an LCD display interface and a scanner, allowing
direct connection to velocity-sensitive keyboards, switches, LEDs and sliders. With the
addition of a single external ROM or Flash and a stereo DAC, a complete low-cost
musical instrument can be built that includes reverb and chorus effects, parametric
equalizer, surround effects, orchestrations, pitch-bend and wheel controller, without
compromising on sound quality. The ATSAM9753 is packaged in a standard 144-lead
TQFP package.
Rev. 1774D–DRMSD–11/02
1
1 page  
ATSAM9753
Table 1. Pin Description by Function (Continued)
Pin Name
Pin Number
Type Function
PDWN
84
IN Power down, active low. When power down is active, all output pins are
floating except GPIO1. The crystal oscillator is stopped. To exit from power-
down mode, PDWN should be high and RESET applied.
X1 98, 99
X2
– 11.2896 MHz (nominal) crystal connection. An external clock can also be
used at X1.
TEST[3:0]
79 - 82
IN Test pins, should be grounded
LFT 100
– PLL external RC network
Notes: 1. Like all high-speed HCMOS ICs proper decoupling is mandatory for reliable operation and RFI reduction. The recommended
decoupling is 100 nF at each corner of the IC with an additional 10 µF bulk capacitor close to the X1, X2 pins.
www.DataSheet4U.c2o.mThe LCD display interface signals are controlled by firmware, therefore, their timing relationship is determined by firmware
only.
3. The ATSAM9753 connects to a variety of stereo DACs or Codecs from 16 to 20 bits, with Japanese or I2S format. This
includes AD1857JRS, AK4352, AK4393, AK4528, PCM1718, PCM1739, PCM3001, TDA1543, TDA1545 . When Japanese
format is used, only 16 bits is supported without external circuitry.
1774D–DRMSD–11/02
5
5 Page 
Timing Diagrams
All timings are relative to 11.2896 MHz crystal between X1 and X2.
Figure 3. Scanning Timings (Keyboard, Switches, LEDs and Sliders) Timing Diagram
tSCLK
tKBD
tIO
SCLK
KBDIO
www.DataSheetR4UO.cWom[2:0]
BR[10:0]
tKA
tKD
tIOA
tIOD
MK[10:0]
tKA
tKD tIOG
VIN
tVA
tVD
ATSAM9753
tIOH
Table 6. Scanning Timing Parameters
Symbol Parameter
Min Typ Max Unit
tKBD
tIO
tSCLK
tKA
Keyboard access (KBDIO high time)
Switches/leds access (KBDIO low time)
Internal scanning clock period
Break (contact1) and Make (contact2) data from keyboard valid
from rising KBDIO
1.4
4.3
354
1.2
µs
µs
ns
µs
tKD Break (contact1) and Make (contact2) data from Keyboard
floating from rising KBDIO
1.3
1.6 µs
tIOA Switch data valid from falling KBDIO
tIOD Switch data floating from falling KBDIO
4.1
tIOG LED data MK guard time
177
tIOH LED data floating from rising KBDIO
0
tVA Analog VIN sample start time from ROW change (Start sample 1
and hold voltage follow mode)
4 µs
4.4 µs
27 ns
88 ns
µs
tVD Analog VIN sample end time from ROW change (Switch to hold
mode)
2.2 µs
1774D–DRMSD–11/02
11
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