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PDF ST62E85B Data sheet ( Hoja de datos )
| Número de pieza | ST62E85B | |
| Descripción | 8-BIT OTP/EPROM MCU | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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ST62T85B/E85B
8-BIT OTP/EPROM MCU WITH LCD DRIVER,
EEPROM AND A/D CONVERTER
s 3.0 to 6.0V Supply Operating Range
s 8 MHz Maximum Clock Frequency
www.DataSheet4Us.co-m40 to +85°C Operating Temperature Range
s Run, Wait and Stop Modes
s 5 Interrupt Vectors
s Look-up Table capability in Program Memory
s Data Storage in Program Memory:
User selectable size
s Data RAM: 192 bytes
s Data EEPROM: 128 bytes
s User Programmable Options
s 12 I/O pins, fully programmable as:
– Input with pull-up resistor
– Input without pull-up resistor
– Input with interrupt generation
– Open-drain or push-pull output
– Analog Input
s 4 I/O lines can sink up to 20mA to drive LEDs or
TRIACs directly
s One 8-bit Timer/Counter with 7-bit
programmable prescaler
s One 8-bit Autoreload Timer/Counter with 7-bit
programmable prescaler and output compare
s Digital Watchdog
s 8-bit A/D Converter with 8 analog inputs
s 8-bit Synchronous Peripheral Interface (SPI)
s 8-bit Asynchronous Peripheral Interface (UART)
s LCD driver with 40 segment outputs, 8
backplane outputs, 8 software selectable
segment/backplane outputs and selectable
multiplexing ratio.
s On-chip Clock oscillator can be driven by Quartz
Crystal or Ceramic resonator
s One external Non-Maskable Interrupt
s ST6285-EMU2 Emulation and Development
System (connects to an MS-DOS PC via a
parallel port).
PQFP80
CQFP80W
(See end of Datasheet for Ordering Information)
DEVICE SUMMARY
DEVICE
ST62T85B
ST62E85B
OTP
(Bytes)
7948
EPROM
(Bytes)
-
7948
LCD display
8 x48 or 16 x 40
8 x48 or 16 x 40
August 1999
Rev. 2.5
1/76
1
1 page  
ST62T85B/E85B
1 GENERAL DESCRIPTION
1.1 INTRODUCTION
The ST62T85B and ST62E85B devices are low
cost members of the ST62xx 8-bit HCMOS family
of microcontrollers, which is targeted at low to me-
dium complexity applications. All ST62xx devices
are based on a building block approach: a com-
www.DataSheet4U.com
Figure 1. Block Diagram
mon core is surrounded by a number of on-chip
peripherals.
The ST62E85B is the erasable EPROM version of
the ST62T85B device, which may be used to em-
ulate the ST62T85B device, as well as the respec-
tive ST6285B ROM devices.
TE ST/VPP
NMI
TEST
8-BIT
A/D CONVERTER
INTERRUPT
PROGR AM
Memory
7948 bytes
DATA ROM
USE R
SELECTABLE
DATA RAM
192 Bytes
DATA EEPROM
128 Bytes
PC
STACK LEVEL 1
STACK LEVEL 2
STACK LEVEL 3
STACK LEVEL 4
STACK LEVEL 5
STACK LEVEL 6
8 BIT CORE
POWER OSCILLATOR RESET
SUPP LY
VDD VSS OSCin OSCout RESET
(VPP on EPROM/OTP versions only)
PORT A
PORT B
ARTIMER
UART
PORT C
LCD DRIVER
PA4 / TIMER / 20mA Sink
PA5 / Scl / 20mA Sink
PA6 / Sin / 20mA Sink
PA7 / Sout / 20mA Sink
PB0 / RXD / Ain
PB1 / TXD / Ain
PB2..PB3 / Ain
PC4..PC7 / Ain
COM1..COM8
S9..S24, S33..S56
COM9..COM16 / S1..S8
VLCD
VLCD1/5
VLCD2/5
VLCD3/5
VLCD4/5
TIMER
DIGITAL
W ATCHDOG
SPI (SERIAL
PERI PHERAL
INTE RFACE)
VA0479
5/76
5
5 Page 
ST62T85B/E85B
MEMORY MAP (Cont’d)
1.3.3 Data Space
Data Space accommodates all the data necessary
for processing the user program. This space com-
prises the RAM resource, the processor core and
peripheral registers, as well as read-only data
such as constants and look-up tables in Program
memory.
1.3.3.1 Data ROM
www.DataSheet4UA.clol mread-only data is physically stored in program
memory, which also accommodates the Program
Space. The program memory consequently con-
tains the program code to be executed, as well as
the constants and look-up tables required by the
application.
The Data Space locations in which the different
constants and look-up tables are addressed by the
processor core may be thought of as a 64-byte
window through which it is possible to access the
read-only data stored in Program memory.
1.3.3.2 Data RAM/EEPROM
In ST62T85B and ST62E85B devices, the data
space includes 60 bytes of RAM, the accumulator
(A), the indirect registers (X), (Y), the short direct
registers (V), (W), the I/O port registers, the pe-
ripheral data and control registers, the interrupt
option register and the Data ROM Window register
(DRW register).
Additional RAM and EEPROM pages can also be
addressed using banks of 64 bytes located be-
tween addresses 00h and 3Fh.
1.3.4 Stack Space
Stack space consists of six 12-bit registers which
are used to stack subroutine and interrupt return
addresses, as well as the current program counter
contents.
Table 3. Additional RAM/EEPROM Banks.
Device
RAM EEPROM LCD RAM
ST62T85B/E85B 2 x 64 bytes 2 x 64 bytes 2 x 64 bytes
Table 4. ST62T85B/E85B Data Memory Space
DATA RAM/EEPROM, LCD RAM
DATA ROM WINDOW AREA
X REGIST ER
Y REGIST ER
V REGIST ER
W REGISTE R
000h
03Fh
040h
07Fh
080h
081h
082h
083h
DATA RAM
PORT A DATA REGISTER
PORT B DATA REGISTER
SPI INTERRUPT DISABLE REGISTER
PORT C DATA REGISTER
PORT A DIRECTION REGISTER
PORT B DIRECTION REGISTER
PORT C DIRECTION REGISTE R
RESERVED
INTER RUPT OPTION REGISTER
084h
0BFh
0C0h
0C1h
0C2h
0C3h
0C4h
0C5h
0C6h
0C7h
0C8h*
DATA ROM WINDOW REGISTE R
0C9h*
ROM BANK SELECT REGISTER
0CAh*
DATA RAM/EEPROM, LCD BANK SELECT REGISTER 0CBh*
PORT A OPTION REGISTE R
0CCh
RESERVED
0CDh
PORT B OPTION REGISTE R
0CEh
PORT C OPTION REGISTER
0CFh
A/D DATA REGISTER
0D0h
A/D CONTROL REGIST ER
0D1h
TIMER 1 PRESCALER REGISTER
0D2h
TIMER 1 COUNTE R REGISTER
0D3h
TIMER 1 STATUS/CONTROL REGISTER
RESERVED
UART DATA REGISTER
UART CONTROL REGISTER
WATCHDOG REGISTER
RESERVED
LCD MODE CONTROL REGISTE R
SPI DATA REGISTER
RESERVED
0D4h
0D5h
0D6h
0D7h
0D8h
0D9h
0DAh
0DBh
0DCh
0DDh
0DEh
EEPROM CONTROL REGISTER
0DFh
0E0h
RESERVED
ARTIMER MODE/CONTROL REGISTER
ARTIMER STATUS/CONTROL REGISTER 0
ARTIMER STATUS/CONTROL REGISTER 1
RES ERVED
ARTIMER RELOAD/CAPTU RE REGIST ER
ARTIMER COMPARE REGISTE R
ARTIMER LOAD REGISTER
0E4h
0E5h
0E6h
0E7h
0E9h
0EAh
0EBh
0ECh
RES ERVED
ACCUMULATOR
* WRIT E ONLY REGISTER
0FEh
OFFh
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| PDF Descargar | [ Datasheet ST62E85B.PDF ] | |
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